[llvm] [RISCV] Support RVV register overlapping constraints (PR #145004)

[Pengcheng Wang via llvm-commits]

wangpc-pp wrote:

> Did you get any estimate of runtime impact? I realize this might be quite challenging, but even something like dynamic icount for a modified qemu might be interesting. Essentially, I'm curious as to where the spills and fills are, and whether removing some of them actually helps.

No, we haven't evaluated the runtime impact because as you have said, the efforts we need to make qemu runnable could be large and we just wanted a quick estimation. The overlapping constraints will only affect the RA (the pressure) so I think we can only pay attention to the spill/reload part. 

I posted the changes here: https://github.com/llvm/llvm-project/pull/145353. I checked some of the spills/reloads, and I think some mask cases are interesting.

https://github.com/llvm/llvm-project/pull/145004