[llvm] [PowerPC] eliminate RLWINM instruction following LBARX as possible (PR #144089)

[Lei Huang via llvm-commits]

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@@ -1281,7 +1281,40 @@ bool PPCMIPeephole::simplifyCode() {
         Simplified = true;
         break;
       }
-      case PPC::RLWINM:
+      case PPC::RLWINM: {
+        Register SrcReg = MI.getOperand(1).getReg();
+        MachineInstr *DefMI = MRI->getVRegDef(SrcReg);
+
+        if (DefMI) {
+          unsigned Opcode = DefMI->getOpcode();
+          if (Opcode == PPC::LBARX || Opcode == PPC::LHARX) {
+            unsigned SH = MI.getOperand(2).getImm();
+            unsigned MB = MI.getOperand(3).getImm();
+            unsigned ME = MI.getOperand(4).getImm();
+
+            // LBARX already sets the upper 24 bits of the destination register
+            // to zero. If the register is cleared to zero in the upper 24 bits
+            // using RLWINM later, we eliminate the RLWINM. Same applies to
+            // LHARX.
+            if (SH == 0 && ME == 31 &&
+                ((MB == 24 && Opcode == PPC::LBARX) ||
+                 (MB == 16 && Opcode == PPC::LHARX))) {
+              Register SrcReg = MI.getOperand(0).getReg();
+              Register DstReg =
+                  DefMI->getOperand(0).getReg();
+
+              // Replace all uses of RLWINM's result with LBARX result
+              MRI->replaceRegWith(DstReg, SrcReg);
+	      addRegToUpdate(DstReg);
+	      addRegToUpdate(SrcReg);
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lei137 wrote:

clang format.

https://github.com/llvm/llvm-project/pull/144089