[llvm] [RISCV] Guard the alternative static chain register use on ILP32E/LP64E (PR #142715)

Craig Topper via llvm-commits llvm-commits at lists.llvm.org
Tue Jun 10 08:49:56 PDT 2025


topperc wrote:

Can we have a test for this? You use the `not` command in the RUN line to turn a failing test into a passing test. For example, `llvm/test/CodeGen/RISCV/sifive-interrupt-attr-err.ll`

https://github.com/llvm/llvm-project/pull/142715


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