[llvm] [X86][FP16] Bitcast v8f16/v16f16 to vXi8 to use vXi8 vselect (PR #143484)

[Phoebe Wang via llvm-commits]

https://github.com/phoebewang created https://github.com/llvm/llvm-project/pull/143484

Fixes: https://godbolt.org/z/fbPYzjxTs

>From 197e23fe4356468dc59a99fa81a3636fc4e18e33 Mon Sep 17 00:00:00 2001
From: "Wang, Phoebe" <phoebe.wang at intel.com>
Date: Mon, 9 Jun 2025 16:33:11 +0800
Subject: [PATCH] [X86][FP16] Bitcast v8f16/v16f16 to vXi8 to use vXi8 vselect

Fixes: https://godbolt.org/z/fbPYzjxTs
---
 llvm/lib/Target/X86/X86ISelLowering.cpp  |  4 +++-
 llvm/test/CodeGen/X86/avx512fp16-novl.ll | 15 +++++++++++++++
 2 files changed, 18 insertions(+), 1 deletion(-)

diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index b34215b316128..b3ea1b09d1dd1 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -18555,7 +18555,9 @@ SDValue X86TargetLowering::LowerVSELECT(SDValue Op, SelectionDAG &DAG) const {
     return SDValue();
 
   case MVT::v8i16:
-  case MVT::v16i16: {
+  case MVT::v16i16:
+  case MVT::v8f16:
+  case MVT::v16f16: {
     // Bitcast everything to the vXi8 type and use a vXi8 vselect.
     MVT CastVT = MVT::getVectorVT(MVT::i8, NumElts * 2);
     Cond = DAG.getBitcast(CastVT, Cond);
diff --git a/llvm/test/CodeGen/X86/avx512fp16-novl.ll b/llvm/test/CodeGen/X86/avx512fp16-novl.ll
index c64a59432abd2..1c4b7316c283c 100644
--- a/llvm/test/CodeGen/X86/avx512fp16-novl.ll
+++ b/llvm/test/CodeGen/X86/avx512fp16-novl.ll
@@ -207,3 +207,18 @@ entry:
   %s = select <8 x i1> %c, <8 x half> splat (half 0xH3C00), <8 x half> %x
   ret <8 x half> %s
 }
+
+define <4 x half> @select2(<4 x i32> %0, <4 x half> %1) {
+; CHECK-LABEL: select2:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    vpxor %xmm2, %xmm2, %xmm2
+; CHECK-NEXT:    vpcmpeqd %xmm2, %xmm0, %xmm0
+; CHECK-NEXT:    vpackssdw %xmm0, %xmm0, %xmm0
+; CHECK-NEXT:    vmovq {{.*#+}} xmm2 = [9.6E+1,9.7E+1,9.8E+1,9.9E+1,0.0E+0,0.0E+0,0.0E+0,0.0E+0]
+; CHECK-NEXT:    vpblendvb %xmm0, %xmm1, %xmm2, %xmm0
+; CHECK-NEXT:    retq
+entry:
+  %2 = icmp eq <4 x i32> %0, zeroinitializer
+  %3 = select <4 x i1> %2, <4 x half> %1, <4 x half> <half 0xH5600, half 0xH5610, half 0xH5620, half 0xH5630>
+  ret <4 x half> %3
+}