[llvm] [SPARC][IAS] Make Is64Bit imply FeatureV9 in the assembler (PR #143232)

Fangrui Song via llvm-commits llvm-commits at lists.llvm.org
Sat Jun 7 09:11:44 PDT 2025


================
@@ -507,33 +525,57 @@
         ! V9: wr %i0, 1, %asr21         ! encoding: [0xab,0x86,0x20,0x01]
         wr %i0, 1, %clear_softint
 
+        ! V8:      error: invalid instruction mnemonic
+        ! V8-NEXT: stw %o1, [%o0]
         ! V9: st %o1, [%o0]             ! encoding: [0xd2,0x22,0x00,0x00]
         stw %o1, [%o0]
+        ! V8:      error: invalid instruction mnemonic
+        ! V8-NEXT: stuw %o1, [%o0]
         ! V9: st %o1, [%o0]             ! encoding: [0xd2,0x22,0x00,0x00]
         stuw %o1, [%o0]
+        ! V8:      error: invalid instruction mnemonic
+        ! V8-NEXT: stsw %o1, [%o0]
         ! V9: st %o1, [%o0]             ! encoding: [0xd2,0x22,0x00,0x00]
         stsw %o1, [%o0]
 
+        ! V8:      error: invalid instruction mnemonic
+        ! V8-NEXT: stwa %o2, [%i0 + %l6] 131
         ! V9: sta %o2, [%i0+%l6] #ASI_SNF ! encoding: [0xd4,0xa6,0x10,0x76]
         stwa %o2, [%i0 + %l6] 131
+        ! V8:      error: invalid instruction mnemonic
+        ! V8-NEXT: stuwa %o2, [%i0 + %l6] 131
         ! V9: sta %o2, [%i0+%l6] #ASI_SNF ! encoding: [0xd4,0xa6,0x10,0x76]
         stuwa %o2, [%i0 + %l6] 131
+        ! V8:      error: invalid instruction mnemonic
+        ! V8-NEXT: stswa %o2, [%i0 + %l6] 131
         ! V9: sta %o2, [%i0+%l6] #ASI_SNF ! encoding: [0xd4,0xa6,0x10,0x76]
         stswa %o2, [%i0 + %l6] 131
 
         !! SPARCv9 provides a new variant of ASI-tagged memory accesses.
+        ! V8:      error: instruction requires a CPU feature not currently enabled
+        ! V8-NEXT: ldxa [%g2] %asi, %g0
         ! V9: ldxa [%g2] %asi, %g0    ! encoding: [0xc0,0xd8,0xa0,0x00]
         ldxa [%g2] %asi, %g0
+        ! V8:      error: instruction requires a CPU feature not currently enabled
+        ! V8-NEXT: stxa %g0, [%g2] %asi
         ! V9: stxa %g0, [%g2] %asi    ! encoding: [0xc0,0xf0,0xa0,0x00]
         stxa %g0, [%g2] %asi
+        ! V8:      error: instruction requires a CPU feature not currently enabled
+        ! V8-NEXT: ldxa [%g2 + 5] %asi, %g0
         ! V9: ldxa [%g2+5] %asi, %g0    ! encoding: [0xc0,0xd8,0xa0,0x05]
         ldxa [%g2 + 5] %asi, %g0
+        ! V8:      error: instruction requires a CPU feature not currently enabled
+        ! V8-NEXT: stxa %g0, [%g2 + 5] %asi
         ! V9: stxa %g0, [%g2+5] %asi    ! encoding: [0xc0,0xf0,0xa0,0x05]
         stxa %g0, [%g2 + 5] %asi
 
         !! Also make sure named ASI tags are parsed properly.
+        ! V8:      error: instruction requires a CPU feature not currently enabled
----------------
MaskRay wrote:

V8 checks are exclusively for errors. In such a case, we should test `[[#@LINE+2]]:column: error: ...`. llvm-mc copies the source line that triggers the error, but it is not useful and should be removed.

https://github.com/llvm/llvm-project/pull/143232


More information about the llvm-commits mailing list