[llvm] [SPARC][IAS] Make Is64Bit imply FeatureV9 in the assembler (PR #143232)

[via llvm-commits]

Rot127 wrote:

> It's possible to target V9 while still using 32-bit addressing, that's why HasV9 is placed under Is64Bit and not otherwise.

I see. Thanks!

> Not sure if it's required by the spec, but looking at released processors I think this is true in practice.
> Should I specify those too?

If it is the right decision for LLVM sure. We use the LLVM architecture definitions to generate our disassembler modules in Capstone. The closer the definitions are to the ISA the better for us.
But I reckon this is not always the best option for LLVM use cases. And I am not deep enough in LLVM related problems to allow myself judgement on this I think.

https://github.com/llvm/llvm-project/pull/143232