[llvm] [AMDGPUI][True16][CodeGen] global atomic load i8 in true16 mode (PR #142822)

[Brox Chen via llvm-commits]

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@@ -1678,15 +1678,12 @@ def : FlatLoadPat_D16 <FLAT_LOAD_SHORT_D16, load_d16_lo_flat, v2f16>;
 let OtherPredicates = [HasFlatGlobalInsts] in {
 
 defm : GlobalFLATLoadPats <GLOBAL_LOAD_UBYTE, atomic_load_aext_8_global, i32>;
-defm : GlobalFLATLoadPats <GLOBAL_LOAD_UBYTE, atomic_load_aext_8_global, i16>;
 defm : GlobalFLATLoadPats <GLOBAL_LOAD_UBYTE, atomic_load_zext_8_global, i32>;
-defm : GlobalFLATLoadPats <GLOBAL_LOAD_UBYTE, atomic_load_zext_8_global, i16>;
 defm : GlobalFLATLoadPats <GLOBAL_LOAD_USHORT, atomic_load_aext_16_global, i32>;
 defm : GlobalFLATLoadPats <GLOBAL_LOAD_USHORT, atomic_load_nonext_16_global, i16>;
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broxigarchen wrote:

We might have some other isel patterns that we thought it's ok to use vgpr32 in true16 mode for now, but could end up hitting a problem becoming a vpgr_32 copied to a sgpr_lo16 and get lowered to a readfirstlane.

I would prefer to merge this for now as it unblock true16 enabling in compute team side. I will open another patch later

https://github.com/llvm/llvm-project/pull/142822