[llvm] [RISCV] Select unsigned bitfield insert for XAndesPerf (PR #142737)

[Jim Lin via llvm-commits]

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@@ -1324,6 +1341,23 @@ void RISCVDAGToDAGISel::Select(SDNode *Node) {
             return;
           }
 
+          // Try to use an unsigned bitfield insert (e.g., nds.bfoz) if
+          // available.
+          // Transform (and (shl x, c2), c1)
+          //        -> (<bfinsert> x, msb, lsb)
+          // e.g.
+          //     (and (shl x, 12), 0x00fff000)
+          //     If XLen = 32 and C2 = 12, then
+          //       Len = 32 - 8 - 12 = 12,
+          //       Lsb = 32 - 8 - 1 = 23 and Msb = 12
+          //     -> nds.bfoz x, 12, 23
+          const unsigned Len = XLen - Leading - C2;
+          const unsigned Lsb = XLen - Leading - 1;
+          // If Len is 1, the Msb will be 0 instead of C2.
+          unsigned Msb = Len == 1 ? 0 : C2;
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tclin914 wrote:

Thanks. It looks more readable.

https://github.com/llvm/llvm-project/pull/142737