[llvm] AMDGPU: Add test showing bit operations that should be reducible (PR #141837)

[Jay Foad via llvm-commits]

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@@ -0,0 +1,162 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
+; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 < %s | FileCheck %s
+
+; Check for situations where we could reduce the width of bitwise
+; operations.
+
+
+; Should be able to reduce this to a 32-bit or plus a copy
----------------
jayfoad wrote:

```suggestion
; Should be able to reduce this to a 32-bit xor plus a copy
```

https://github.com/llvm/llvm-project/pull/141837