[llvm] [WIP][SDAG] Add partial_reduce_sumla node (PR #141267)

[Sander de Smalen via llvm-commits]

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@@ -1874,8 +1874,8 @@ AArch64TargetLowering::AArch64TargetLowering(const TargetMachine &TM,
   if (EnablePartialReduceNodes && Subtarget->isSVEorStreamingSVEAvailable()) {
     // Mark known legal pairs as 'Legal' (these will expand to UDOT or SDOT).
     // Other pairs will default to 'Expand'.
-    setPartialReduceMLAAction(MVT::nxv2i64, MVT::nxv8i16, Legal);
-    setPartialReduceMLAAction(MVT::nxv4i32, MVT::nxv16i8, Legal);
+    setPartialReduceMLAAction(MVT::nxv2i64, MVT::nxv8i16, Custom);
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sdesmalen-arm wrote:

Can we change this interface (and internal table) to include the kind of extension being done? (signed/unsigned or mixed)

https://github.com/llvm/llvm-project/pull/141267