[llvm] [NVPTX] Vectorize and lower 256-bit global loads/stores for sm_100+/ptx88+ (PR #139292)

[Alex MacLean via llvm-commits]

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@@ -319,6 +319,9 @@ void NVPTXInstPrinter::printLdStCode(const MCInst *MI, int OpNum,
     case NVPTX::PTXLdStInstCode::V4:
       O << ".v4";
       return;
+    case NVPTX::PTXLdStInstCode::V8:
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AlexMaclean wrote:

Why is this value stored in the instruction and printed via a flag? It seems like each instruction is only capable of representing one type of vector as the number of output operands is fixed. 

https://github.com/llvm/llvm-project/pull/139292