[llvm] [NVPTX] Vectorize and lower 256-bit global loads/stores for sm_100+/ptx88+ (PR #139292)

[Alex MacLean via llvm-commits]

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@@ -1195,6 +1197,12 @@ bool NVPTXDAGToDAGISel::tryLoadVector(SDNode *N) {
     FromTypeWidth = TotalWidth / 4;
     VecType = NVPTX::PTXLdStInstCode::V4;
     break;
+  case NVPTXISD::LoadV8:
+    if (!Subtarget->has256BitMaskedLoadStore())
+      return false;
+    FromTypeWidth = TotalWidth / 8;
+    VecType = NVPTX::PTXLdStInstCode::V8;
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AlexMaclean wrote:

As with the other switches, I think we should only produce the number of elements and use that to derive these other values.

https://github.com/llvm/llvm-project/pull/139292