[llvm] [GlobalISel][AMDGPU] Fix handling of v2i128 type for AND, OR, XOR (PR #138574)
Chinmay Deshpande via llvm-commits
llvm-commits at lists.llvm.org
Thu May 8 07:58:31 PDT 2025
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@@ -872,12 +872,14 @@ AMDGPULegalizerInfo::AMDGPULegalizerInfo(const GCNSubtarget &ST_,
// Report legal for any types we can handle anywhere. For the cases only legal
// on the SALU, RegBankSelect will be able to re-legalize.
getActionDefinitionsBuilder({G_AND, G_OR, G_XOR})
- .legalFor({S32, S1, S64, V2S32, S16, V2S16, V4S16})
- .clampScalar(0, S32, S64)
- .moreElementsIf(isSmallOddVector(0), oneMoreElement(0))
- .fewerElementsIf(vectorWiderThan(0, 64), fewerEltsToSize64Vector(0))
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chinmaydd wrote:
@arsenm sorry for the ping. Thoughts ?
https://github.com/llvm/llvm-project/pull/138574
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