[llvm] MIPSr6: Set FMAXNUM and FMINNUM as Legal (PR #139009)
YunQiang Su via llvm-commits
llvm-commits at lists.llvm.org
Wed May 7 20:15:19 PDT 2025
https://github.com/wzssyqa created https://github.com/llvm/llvm-project/pull/139009
Now we define FMAXNUM and FMINNUM as IEEE754-2008 with +0.0>-0.0. MIPSr6's fmax/fmin just follow this rules full.
FMAXNUM_IEEE and FMINNUM_IEEE will be removed in future once:
1. Fixes FMAXNUM/FMINNUM for all targets
2. The use of FMAXNUM_IEEE/FMINNUM_IEEE are not used by middle end anymore.
>From df4706902df5b7dcdf1e7ba5ed289b6b806419e9 Mon Sep 17 00:00:00 2001
From: YunQiang Su <yunqiang at isrc.iscas.ac.cn>
Date: Thu, 8 May 2025 11:10:57 +0800
Subject: [PATCH] MIPSr6: Set FMAXNUM and FMINNUM as Legal
Now we define FMAXNUM and FMINNUM as IEEE754-2008 with +0.0>-0.0.
MIPSr6's fmax/fmin just follow this rules full.
FMAXNUM_IEEE and FMINNUM_IEEE will be removed in future once:
1. Fixes FMAXNUM/FMINNUM for all targets
2. The use of FMAXNUM_IEEE/FMINNUM_IEEE are not used by middle
end anymore.
---
llvm/lib/Target/Mips/Mips32r6InstrInfo.td | 12 +++
llvm/lib/Target/Mips/MipsISelLowering.cpp | 8 +-
llvm/test/CodeGen/Mips/mipsr6-minmaxnum.ll | 85 +++++++++-------------
3 files changed, 49 insertions(+), 56 deletions(-)
diff --git a/llvm/lib/Target/Mips/Mips32r6InstrInfo.td b/llvm/lib/Target/Mips/Mips32r6InstrInfo.td
index 27b9ce60ba826..fead376b8c338 100644
--- a/llvm/lib/Target/Mips/Mips32r6InstrInfo.td
+++ b/llvm/lib/Target/Mips/Mips32r6InstrInfo.td
@@ -1122,15 +1122,27 @@ let AdditionalPredicates = [NotInMicroMips] in {
def : MipsPat<(fmaxnum_ieee f32:$lhs, f32:$rhs),
(MAX_S f32:$lhs, f32:$rhs)>,
ISA_MIPS32R6;
+ def : MipsPat<(fmaxnum f32:$lhs, f32:$rhs),
+ (MAX_S f32:$lhs, f32:$rhs)>,
+ ISA_MIPS32R6;
def : MipsPat<(fmaxnum_ieee f64:$lhs, f64:$rhs),
(MAX_D f64:$lhs, f64:$rhs)>,
ISA_MIPS32R6;
+ def : MipsPat<(fmaxnum f64:$lhs, f64:$rhs),
+ (MAX_D f64:$lhs, f64:$rhs)>,
+ ISA_MIPS32R6;
def : MipsPat<(fminnum_ieee f32:$lhs, f32:$rhs),
(MIN_S f32:$lhs, f32:$rhs)>,
ISA_MIPS32R6;
+ def : MipsPat<(fminnum f32:$lhs, f32:$rhs),
+ (MIN_S f32:$lhs, f32:$rhs)>,
+ ISA_MIPS32R6;
def : MipsPat<(fminnum_ieee f64:$lhs, f64:$rhs),
(MIN_D f64:$lhs, f64:$rhs)>,
ISA_MIPS32R6;
+ def : MipsPat<(fminnum f64:$lhs, f64:$rhs),
+ (MIN_D f64:$lhs, f64:$rhs)>,
+ ISA_MIPS32R6;
def : MipsPat<(f32 (fcanonicalize f32:$src)),
(MIN_S f32:$src, f32:$src)>,
ISA_MIPS32R6;
diff --git a/llvm/lib/Target/Mips/MipsISelLowering.cpp b/llvm/lib/Target/Mips/MipsISelLowering.cpp
index 55fc636d3c781..4534f2a877030 100644
--- a/llvm/lib/Target/Mips/MipsISelLowering.cpp
+++ b/llvm/lib/Target/Mips/MipsISelLowering.cpp
@@ -365,12 +365,12 @@ MipsTargetLowering::MipsTargetLowering(const MipsTargetMachine &TM,
if (Subtarget.hasMips32r6()) {
setOperationAction(ISD::FMINNUM_IEEE, MVT::f32, Legal);
setOperationAction(ISD::FMAXNUM_IEEE, MVT::f32, Legal);
- setOperationAction(ISD::FMINNUM, MVT::f32, Expand);
- setOperationAction(ISD::FMAXNUM, MVT::f32, Expand);
+ setOperationAction(ISD::FMINNUM, MVT::f32, Legal);
+ setOperationAction(ISD::FMAXNUM, MVT::f32, Legal);
setOperationAction(ISD::FMINNUM_IEEE, MVT::f64, Legal);
setOperationAction(ISD::FMAXNUM_IEEE, MVT::f64, Legal);
- setOperationAction(ISD::FMINNUM, MVT::f64, Expand);
- setOperationAction(ISD::FMAXNUM, MVT::f64, Expand);
+ setOperationAction(ISD::FMINNUM, MVT::f64, Legal);
+ setOperationAction(ISD::FMAXNUM, MVT::f64, Legal);
setOperationAction(ISD::IS_FPCLASS, MVT::f32, Legal);
setOperationAction(ISD::IS_FPCLASS, MVT::f64, Legal);
} else {
diff --git a/llvm/test/CodeGen/Mips/mipsr6-minmaxnum.ll b/llvm/test/CodeGen/Mips/mipsr6-minmaxnum.ll
index 2a0ad07474c09..4c337392a7a26 100644
--- a/llvm/test/CodeGen/Mips/mipsr6-minmaxnum.ll
+++ b/llvm/test/CodeGen/Mips/mipsr6-minmaxnum.ll
@@ -1,80 +1,61 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
; RUN: llc %s -mtriple=mipsisa32r6el-linux-gnu -o - | \
; RUN: FileCheck %s --check-prefix=MIPS32R6EL
; RUN: llc %s -mtriple=mipsisa64r6el-linux-gnuabi64 -o - | \
; RUN: FileCheck %s --check-prefix=MIPS64R6EL
define float @mins(float %x, float %y) {
-; MIPS32R6EL-LABEL: mins
-; MIPS32R6EL: # %bb.0:
-; MIPS32R6EL-NEXT: min.s $f0, $f14, $f14
-; MIPS32R6EL-NEXT: min.s $f1, $f12, $f12
-; MIPS32R6EL-NEXT: jr $ra
-; MIPS32R6EL-NEXT: min.s $f0, $f1, $f0
+; MIPS32R6EL-LABEL: mins:
+; MIPS32R6EL: # %bb.0:
+; MIPS32R6EL-NEXT: jr $ra
+; MIPS32R6EL-NEXT: min.s $f0, $f12, $f14
;
-; MIPS64R6EL-LABEL: mins
-; MIPS64R6EL: # %bb.0:
-; MIPS64R6EL-NEXT: min.s $f0, $f13, $f13
-; MIPS64R6EL-NEXT: min.s $f1, $f12, $f12
-; MIPS64R6EL-NEXT: jr $ra
-; MIPS64R6EL-NEXT: min.s $f0, $f1, $f0
-
+; MIPS64R6EL-LABEL: mins:
+; MIPS64R6EL: # %bb.0:
+; MIPS64R6EL-NEXT: jr $ra
+; MIPS64R6EL-NEXT: min.s $f0, $f12, $f13
%r = tail call float @llvm.minnum.f32(float %x, float %y)
ret float %r
}
define float @maxs(float %x, float %y) {
-; MIPS32R6EL-LABEL: maxs
-; MIPS32R6EL: # %bb.0:
-; MIPS32R6EL-NEXT: min.s $f0, $f14, $f14
-; MIPS32R6EL-NEXT: min.s $f1, $f12, $f12
-; MIPS32R6EL-NEXT: jr $ra
-; MIPS32R6EL-NEXT: max.s $f0, $f1, $f0
+; MIPS32R6EL-LABEL: maxs:
+; MIPS32R6EL: # %bb.0:
+; MIPS32R6EL-NEXT: jr $ra
+; MIPS32R6EL-NEXT: max.s $f0, $f12, $f14
;
-; MIPS64R6EL-LABEL: maxs
-; MIPS64R6EL: # %bb.0:
-; MIPS64R6EL-NEXT: min.s $f0, $f13, $f13
-; MIPS64R6EL-NEXT: min.s $f1, $f12, $f12
-; MIPS64R6EL-NEXT: jr $ra
-; MIPS64R6EL-NEXT: max.s $f0, $f1, $f0
-
+; MIPS64R6EL-LABEL: maxs:
+; MIPS64R6EL: # %bb.0:
+; MIPS64R6EL-NEXT: jr $ra
+; MIPS64R6EL-NEXT: max.s $f0, $f12, $f13
%r = tail call float @llvm.maxnum.f32(float %x, float %y)
ret float %r
}
define double @mind(double %x, double %y) {
-; MIPS32R6EL-LABEL: mind
-; MIPS32R6EL: # %bb.0:
-; MIPS32R6EL-NEXT: min.d $f0, $f14, $f14
-; MIPS32R6EL-NEXT: min.d $f1, $f12, $f12
-; MIPS32R6EL-NEXT: jr $ra
-; MIPS32R6EL-NEXT: min.d $f0, $f1, $f0
+; MIPS32R6EL-LABEL: mind:
+; MIPS32R6EL: # %bb.0:
+; MIPS32R6EL-NEXT: jr $ra
+; MIPS32R6EL-NEXT: min.d $f0, $f12, $f14
;
-; MIPS64R6EL-LABEL: mind
-; MIPS64R6EL: # %bb.0:
-; MIPS64R6EL-NEXT: min.d $f0, $f13, $f13
-; MIPS64R6EL-NEXT: min.d $f1, $f12, $f12
-; MIPS64R6EL-NEXT: jr $ra
-; MIPS64R6EL-NEXT: min.d $f0, $f1, $f0
-
+; MIPS64R6EL-LABEL: mind:
+; MIPS64R6EL: # %bb.0:
+; MIPS64R6EL-NEXT: jr $ra
+; MIPS64R6EL-NEXT: min.d $f0, $f12, $f13
%r = tail call double @llvm.minnum.f64(double %x, double %y)
ret double %r
}
define double @maxd(double %x, double %y) {
-; MIPS32R6EL-LABEL: maxd
-; MIPS32R6EL: # %bb.0:
-; MIPS32R6EL-NEXT: min.d $f0, $f14, $f14
-; MIPS32R6EL-NEXT: min.d $f1, $f12, $f12
-; MIPS32R6EL-NEXT: jr $ra
-; MIPS32R6EL-NEXT: max.d $f0, $f1, $f0
+; MIPS32R6EL-LABEL: maxd:
+; MIPS32R6EL: # %bb.0:
+; MIPS32R6EL-NEXT: jr $ra
+; MIPS32R6EL-NEXT: max.d $f0, $f12, $f14
;
-; MIPS64R6EL-LABEL: maxd
-; MIPS64R6EL: # %bb.0:
-; MIPS64R6EL-NEXT: min.d $f0, $f13, $f13
-; MIPS64R6EL-NEXT: min.d $f1, $f12, $f12
-; MIPS64R6EL-NEXT: jr $ra
-; MIPS64R6EL-NEXT: max.d $f0, $f1, $f0
-
+; MIPS64R6EL-LABEL: maxd:
+; MIPS64R6EL: # %bb.0:
+; MIPS64R6EL-NEXT: jr $ra
+; MIPS64R6EL-NEXT: max.d $f0, $f12, $f13
%r = tail call double @llvm.maxnum.f64(double %x, double %y)
ret double %r
}
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