[llvm] [RISCV][Peephole] Checking regclass compatibility in VMV (PR #138844)
Luke Lau via llvm-commits
llvm-commits at lists.llvm.org
Wed May 7 05:33:35 PDT 2025
================
@@ -607,6 +612,11 @@ bool RISCVVectorPeephole::foldVMV_V_V(MachineInstr &MI) {
if (!MRI->hasOneUse(MI.getOperand(2).getReg()))
return false;
+ const TargetRegisterClass *RC1 = MRI->getRegClass(MI.getOperand(0).getReg());
+ const TargetRegisterClass *RC2 = MRI->getRegClass(MI.getOperand(2).getReg());
+ if (!RC1->hasSubClassEq(RC2))
+ return false;
+
----------------
lukel97 wrote:
Is this being hit by the
```
%0:vr = PseudoVMV_V_I_MF2 $noreg, 0, -1, 5 /* e32 */, 0 /* tu, mu */
%1:vrnov0 = PseudoVMV_V_V_MF2 $noreg, %0, 0, 5 /* e32 */, 0 /* tu, mu */
```
in the added test case? Can this be split out into two separate tests, one for foldVMV_V_V and one for foldUndefPassthruVMV_V_V?
https://github.com/llvm/llvm-project/pull/138844
More information about the llvm-commits
mailing list