[llvm] [llvm] Ensure that soft float targets don't use float/vector code for memops. (PR #107022)

[Alex Rønne Petersen via llvm-commits]

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@@ -2023,6 +2023,11 @@ class TargetLoweringBase {
     return LLT();
   }
 
+  bool useIntScalarMemOps(const AttributeList &FuncAttributes) const {
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alexrp wrote:

> The inverse is not necessarily true - you could implement an ABI that does not use float registers, but the generated code is still allowed to use float registers within a function. That's the case that I think sometimes causes confusion.

I think ARM is the only backend that supports this configuration right now, although it is pretty fragile if you don't massage the CPU feature flags and function attributes just right IIRC. I think ideally every backend should allow this configuration, though; not doing so seems mostly like an artificial restriction.

In my ideal world, you'd set `TM.Options.FloatABIType` to pick the soft/hard ABI, and in the case of soft ABI, optionally set the `use-soft-float` function attribute if you want to also lower all float/vector computation to soft float. `noimplicitfloat` would keep keep its current meaning, i.e. the compiler isn't allowed to introduce float/vector operations that weren't already there.

Clang options would then translate like this:

* `-mfloat-abi=soft`/`-msoft-float`: `FloatABI::ABIType::Soft` + `use-soft-float` + `noimplicitfloat`
* `-mfloat-abi=softfp`: `FloatABI::ABIType::Soft`
* `-mfloat-abi=hard`/`-mhard-float`: `FloatABI::ABIType::Hard`
* `-mno-implicit-float`: `noimplicitfloat`

https://github.com/llvm/llvm-project/pull/107022