[llvm] [LLVM][CodeGen][AArch64] Don't scalarise v8{f16,bf16} vsetcc operations. (PR #135398)

[David Green via llvm-commits]

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@@ -841,18 +841,21 @@ AArch64TargetLowering::AArch64TargetLowering(const TargetMachine &TM,
     setOperationPromotedToType(ISD::FRINT,      V4Narrow, MVT::v4f32);
     setOperationPromotedToType(ISD::FNEARBYINT, V4Narrow, MVT::v4f32);
     setOperationPromotedToType(ISD::FCANONICALIZE, V4Narrow, MVT::v4f32);
+    setOperationPromotedToType(ISD::SETCC,         V4Narrow, MVT::v4f32);
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davemgreen wrote:

Sorry I missed this patch in other reviews and reviewers - my point was that perhaps it is better to get getTypeToPromoteTo to work for vectors too. It doesn't seem very useful to have the function never work and every target need to override half and bfloat vectors types. Something to think about at least, the patch looks good.

https://github.com/llvm/llvm-project/pull/135398