[llvm] [LLVM][TableGen] Parameterize NumToSkip in DecoderEmitter (PR #135882)

LLVM Continuous Integration via llvm-commits llvm-commits at lists.llvm.org
Wed Apr 16 13:14:52 PDT 2025


llvm-ci wrote:

LLVM Buildbot has detected a new failure on builder `ml-opt-devrel-x86-64` running on `ml-opt-devrel-x86-64-b1` while building `llvm` at step 5 "build-unified-tree".

Full details are available at: https://lab.llvm.org/buildbot/#/builders/175/builds/17009

<details>
<summary>Here is the relevant piece of the build log for the reference</summary>

```
Step 5 (build-unified-tree) failure: build (failure)
...
13.407 [2577/64/1220] Building AArch64GenPostLegalizeGILowering.inc...
13.783 [2576/64/1221] Building AArch64GenO0PreLegalizeGICombiner.inc...
13.802 [2575/64/1222] Building AArch64GenPostLegalizeGICombiner.inc...
13.823 [2574/64/1223] Building AArch64GenSystemOperands.inc...
13.916 [2573/64/1224] Building AArch64GenPreLegalizeGICombiner.inc...
13.939 [2572/64/1225] Building AVRGenAsmMatcher.inc...
13.955 [2571/64/1226] Building ARMGenCallingConv.inc...
14.007 [2570/64/1227] Building AArch64GenMCCodeEmitter.inc...
14.072 [2569/64/1228] Building ARMGenAsmWriter.inc...
14.109 [2568/64/1229] Building AArch64GenDisassemblerTables.inc...
FAILED: lib/Target/AArch64/AArch64GenDisassemblerTables.inc /b/ml-opt-devrel-x86-64-b1/build/lib/Target/AArch64/AArch64GenDisassemblerTables.inc 
cd /b/ml-opt-devrel-x86-64-b1/build && /b/ml-opt-devrel-x86-64-b1/build/bin/llvm-tblgen -gen-disassembler --num-to-skip-size=3 -I /b/ml-opt-devrel-x86-64-b1/llvm-project/llvm/lib/Target/AArch64 -I/var/lib/buildbot/.local/lib/python3.7/site-packages/tensorflow/include -I/b/ml-opt-devrel-x86-64-b1/build/include -I/b/ml-opt-devrel-x86-64-b1/llvm-project/llvm/include -I /b/ml-opt-devrel-x86-64-b1/llvm-project/llvm/lib/Target /b/ml-opt-devrel-x86-64-b1/llvm-project/llvm/lib/Target/AArch64/AArch64.td --write-if-changed -o lib/Target/AArch64/AArch64GenDisassemblerTables.inc -d lib/Target/AArch64/AArch64GenDisassemblerTables.inc.d
llvm-tblgen: /b/ml-opt-devrel-x86-64-b1/llvm-project/llvm/utils/TableGen/DecoderEmitter.cpp:150: void {anonymous}::DecoderTable::patchNumToSkip(size_t, uint32_t): Assertion `DestIdx > FixupIdx + NumToSkipSizeInBytes && "Expecting a forward jump in the decoding table"' failed.
PLEASE submit a bug report to https://github.com/llvm/llvm-project/issues/ and include the crash backtrace.
Stack dump:
0.	Program arguments: /b/ml-opt-devrel-x86-64-b1/build/bin/llvm-tblgen -gen-disassembler --num-to-skip-size=3 -I /b/ml-opt-devrel-x86-64-b1/llvm-project/llvm/lib/Target/AArch64 -I/var/lib/buildbot/.local/lib/python3.7/site-packages/tensorflow/include -I/b/ml-opt-devrel-x86-64-b1/build/include -I/b/ml-opt-devrel-x86-64-b1/llvm-project/llvm/include -I /b/ml-opt-devrel-x86-64-b1/llvm-project/llvm/lib/Target /b/ml-opt-devrel-x86-64-b1/llvm-project/llvm/lib/Target/AArch64/AArch64.td --write-if-changed -o lib/Target/AArch64/AArch64GenDisassemblerTables.inc -d lib/Target/AArch64/AArch64GenDisassemblerTables.inc.d
Stack dump without symbol names (ensure you have llvm-symbolizer in your PATH or set the environment var `LLVM_SYMBOLIZER_PATH` to point to it):
0  llvm-tblgen     0x000056330d80b3d8
1  llvm-tblgen     0x000056330d808c75
2  libpthread.so.0 0x00007f505cccd140
3  libc.so.6       0x00007f505c7edd51 gsignal + 321
4  libc.so.6       0x00007f505c7d7537 abort + 291
5  libc.so.6       0x00007f505c7d740f
6  libc.so.6       0x00007f505c7e66d2
7  llvm-tblgen     0x000056330d68152e
8  llvm-tblgen     0x000056330d68d099
9  llvm-tblgen     0x000056330d68cc34
10 llvm-tblgen     0x000056330d68e403
11 llvm-tblgen     0x000056330d6a2cbe
12 llvm-tblgen     0x000056330d846eeb
13 llvm-tblgen     0x000056330d8162a0
14 llvm-tblgen     0x000056330d4f467f
15 libc.so.6       0x00007f505c7d8d7a __libc_start_main + 234
16 llvm-tblgen     0x000056330d4bccba
Aborted
14.132 [2568/63/1230] Building AVRGenAsmWriter.inc...
14.173 [2568/62/1231] Building AVRGenCallingConv.inc...
14.420 [2568/61/1232] Building MSP430GenDisassemblerTables.inc...
14.424 [2568/60/1233] Building ARMGenMCPseudoLowering.inc...
14.469 [2568/59/1234] Building ARMGenAsmMatcher.inc...
14.604 [2568/58/1235] Building ARMGenMCCodeEmitter.inc...
14.615 [2568/57/1236] Building PPCGenFastISel.inc...
14.658 [2568/56/1237] Building AVRGenDAGISel.inc...
14.660 [2568/55/1238] Building AArch64GenAsmWriter.inc...
14.672 [2568/54/1239] Building AArch64GenAsmWriter1.inc...
14.711 [2568/53/1240] Building AVRGenRegisterInfo.inc...
14.726 [2568/52/1241] Building AVRGenMCCodeEmitter.inc...
14.853 [2568/51/1242] Building AArch64GenRegisterBank.inc...
14.858 [2568/50/1243] Building MSP430GenDAGISel.inc...

```

</details>

https://github.com/llvm/llvm-project/pull/135882


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