[llvm] [AArch64] Generalize integer FPR lane stores for all types (PR #134117)

[Benjamin Maxwell via llvm-commits]

================
@@ -24025,6 +24025,13 @@ static SDValue performSTORECombine(SDNode *N,
     EVT VectorVT = Vector.getValueType();
     EVT ElemVT = VectorVT.getVectorElementType();
 
+    // Propagate zero constants (applying this fold may miss optimizations).
+    if (ISD::isConstantSplatVectorAllZeros(Vector.getNode())) {
+      SDValue ZeroElt = DAG.getConstant(0, DL, ValueVT);
+      DAG.ReplaceAllUsesWith(Value, ZeroElt);
+      return SDValue();
+    }
----------------
MacDue wrote:

:+1: I added this fold:
```
+  // extract_vector_elt of undef index -> UNDEF
+  if (Index.isUndef())
+    return DAG.getUNDEF(ScalarVT);
+
+  // extract_vector_elt of zero splat -> zero
+  if (ISD::isConstantSplatVectorAllZeros(VecOp.getNode()))
+    return ScalarVT.isFloatingPoint() ? DAG.getConstantFP(0.0, DL, ScalarVT)
+                                      : DAG.getConstant(0, DL, ScalarVT);
+
```
to `visitEXTRACT_VECTOR_ELT`, which also seemed to resolve this (and a few more cases). But I can maybe post that in a later patch (since it results in changes across a few targets). 

https://github.com/llvm/llvm-project/pull/134117