[llvm] [AArch64][SVE] Add dot product lowering for PARTIAL_REDUCE_MLA node (PR #130933)

[Sander de Smalen via llvm-commits]

================
@@ -1639,6 +1639,31 @@ class TargetLoweringBase {
            getCondCodeAction(CC, VT) == Custom;
   }
 
+  /// Return how a PARTIAL_REDUCE_U/SMLA node with Acc type AccVT and Input type
+  /// InputVT should be treated. Either it's legal, needs to be promoted to a
+  /// larger size, needs to be expanded to some other code sequence, or the
+  /// target has a custom expander for it.
+  LegalizeAction getPartialReduceMLAAction(EVT AccVT, EVT InputVT) const {
+    auto AccSVT = AccVT.getSimpleVT();
+    auto InputSVT = InputVT.getSimpleVT();
+    assert(AccSVT.isValid() && InputSVT.isValid() &&
+           "getPartialReduceMLAAction types aren't valid");
+    auto AccI = AccSVT.SimpleTy;
+    auto InputI = InputSVT.SimpleTy;
+    PartialReduceActionTypes TypePair = std::make_pair(AccI, InputI);
----------------
sdesmalen-arm wrote:

```suggestion
    PartialReduceActionTypes TypePair = {AccVT.getSimpleVT().SimpleTy,
                                         InputVT.getSimpleVT().SimpleTy};
```
I don't think the assert adds much value here, so you can just drop it.

https://github.com/llvm/llvm-project/pull/130933