[llvm] [AArch64][SVE] Add dot product lowering for PARTIAL_REDUCE_MLA node (PR #130933)

[Sander de Smalen via llvm-commits]

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@@ -1585,6 +1585,44 @@ AArch64TargetLowering::AArch64TargetLowering(const TargetMachine &TM,
       setOperationAction(ISD::MSTORE, VT, Custom);
     }
 
+    if (EnablePartialReduceNodes) {
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sdesmalen-arm wrote:

This also needs to include fixed-length types when dot product instructions are available for NEON.

https://github.com/llvm/llvm-project/pull/130933