[llvm] [RISCV] Add TuneNoDefaultUnroll to generic CPUs (PR #135318)

[Pengcheng Wang via llvm-commits]

wangpc-pp wrote:

> > Looks like this causes quite a few regressions on the BPI-F3, rva22u64_v -O3 -flto: https://lnt.lukelau.me/db_default/v4/nts/419
> > The code size increases are pretty big. Maybe the unrolling is too aggressive?
> 
> Oops...This is surprising. I will do more investigations before we go back to this PR.

It may be too aggressive for in-order cores. So I set the runtime unrolling count to 4 for in-order cores just like ARM and AArch64. Can you issue another run to see the effect?

https://github.com/llvm/llvm-project/pull/135318