[llvm] Address Codegen bug related to marking subregister MachineOperand defines as undef (PR #134929)

Matt Arsenault via llvm-commits llvm-commits at lists.llvm.org
Sun Apr 13 01:49:45 PDT 2025


================
@@ -3979,6 +3979,32 @@ void GenericScheduler::reschedulePhysReg(SUnit *SU, bool isTop) {
       continue;
     LLVM_DEBUG(dbgs() << "  Rescheduling physreg copy ";
                DAG->dumpNode(*Dep.getSUnit()));
+
+    // Check to make sure that there are no subreg defintions of the given
+    // register between it's new and old location that are marked as undef. If
+    // so, mark the current instruction as undef instead.
+    SmallVector<MachineOperand *, 1> SubregDefs;
+    for (MachineOperand &MO : Copy->operands()) {
+      if (MO.isReg() && MO.isDef() && MO.getSubReg() != 0) {
+        SubregDefs.push_back(&MO);
+      }
+    }
+    if (SubregDefs.size()) {
+      for (auto CurrInst = InsertPos; CurrInst != Copy; ++CurrInst) {
----------------
arsenm wrote:

You shouldn't need to loop through all the instructions here. You should rely on the LiveIntervals to check if the lanes are undefined or not, after they've been updated in moveInstruction (although actually, maybe LiveIntervals::handleMove ought to be taking care of this in the first place) 

https://github.com/llvm/llvm-project/pull/134929


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