[llvm] [CodeGen] Simplify expandRoundInexactToOdd (PR #134988)

[Jay Foad via llvm-commits]

================
@@ -348,42 +338,38 @@ entry:
 define amdgpu_ps void @fptrunc_f64_to_bf16(double %a, ptr %out) {
 ; GFX-942-LABEL: fptrunc_f64_to_bf16:
 ; GFX-942:       ; %bb.0: ; %entry
-; GFX-942-NEXT:    v_cvt_f32_f64_e64 v6, |v[0:1]|
+; GFX-942-NEXT:    v_cvt_f32_f64_e32 v6, v[0:1]
 ; GFX-942-NEXT:    v_cvt_f64_f32_e32 v[4:5], v6
 ; GFX-942-NEXT:    v_and_b32_e32 v7, 1, v6
-; GFX-942-NEXT:    v_cmp_gt_f64_e64 s[2:3], |v[0:1]|, v[4:5]
-; GFX-942-NEXT:    v_cmp_nlg_f64_e64 s[0:1], |v[0:1]|, v[4:5]
-; GFX-942-NEXT:    v_cmp_eq_u32_e32 vcc, 1, v7
+; GFX-942-NEXT:    v_cmp_gt_f64_e64 s[2:3], |v[0:1]|, |v[4:5]|
+; GFX-942-NEXT:    v_cmp_nlg_f64_e32 vcc, v[0:1], v[4:5]
+; GFX-942-NEXT:    v_cmp_eq_u32_e64 s[0:1], 1, v7
 ; GFX-942-NEXT:    v_cndmask_b32_e64 v4, -1, 1, s[2:3]
 ; GFX-942-NEXT:    v_add_u32_e32 v4, v6, v4
-; GFX-942-NEXT:    s_or_b64 vcc, s[0:1], vcc
+; GFX-942-NEXT:    s_or_b64 vcc, vcc, s[0:1]
 ; GFX-942-NEXT:    v_cndmask_b32_e32 v4, v4, v6, vcc
-; GFX-942-NEXT:    s_brev_b32 s0, 1
-; GFX-942-NEXT:    v_and_or_b32 v5, v1, s0, v4
-; GFX-942-NEXT:    v_bfe_u32 v4, v4, 16, 1
+; GFX-942-NEXT:    v_bfe_u32 v5, v4, 16, 1
 ; GFX-942-NEXT:    s_movk_i32 s0, 0x7fff
-; GFX-942-NEXT:    v_add3_u32 v4, v4, v5, s0
-; GFX-942-NEXT:    v_or_b32_e32 v5, 0x400000, v5
+; GFX-942-NEXT:    v_add3_u32 v5, v5, v4, s0
+; GFX-942-NEXT:    v_or_b32_e32 v4, 0x400000, v4
 ; GFX-942-NEXT:    v_cmp_u_f64_e32 vcc, v[0:1], v[0:1]
 ; GFX-942-NEXT:    s_nop 1
-; GFX-942-NEXT:    v_cndmask_b32_e32 v0, v4, v5, vcc
+; GFX-942-NEXT:    v_cndmask_b32_e32 v0, v5, v4, vcc
 ; GFX-942-NEXT:    flat_store_short_d16_hi v[2:3], v0
 ; GFX-942-NEXT:    s_endpgm
 ;
 ; GFX-950-LABEL: fptrunc_f64_to_bf16:
 ; GFX-950:       ; %bb.0: ; %entry
-; GFX-950-NEXT:    v_cvt_f32_f64_e64 v6, |v[0:1]|
+; GFX-950-NEXT:    v_cvt_f32_f64_e32 v6, v[0:1]
 ; GFX-950-NEXT:    v_cvt_f64_f32_e32 v[4:5], v6
 ; GFX-950-NEXT:    v_and_b32_e32 v7, 1, v6
-; GFX-950-NEXT:    v_cmp_gt_f64_e64 s[2:3], |v[0:1]|, v[4:5]
-; GFX-950-NEXT:    v_cmp_nlg_f64_e64 s[0:1], |v[0:1]|, v[4:5]
-; GFX-950-NEXT:    v_cmp_eq_u32_e32 vcc, 1, v7
+; GFX-950-NEXT:    v_cmp_gt_f64_e64 s[2:3], |v[0:1]|, |v[4:5]|
+; GFX-950-NEXT:    v_cmp_nlg_f64_e32 vcc, v[0:1], v[4:5]
+; GFX-950-NEXT:    v_cmp_eq_u32_e64 s[0:1], 1, v7
 ; GFX-950-NEXT:    v_cndmask_b32_e64 v0, -1, 1, s[2:3]
 ; GFX-950-NEXT:    v_add_u32_e32 v0, v6, v0
-; GFX-950-NEXT:    s_or_b64 vcc, s[0:1], vcc
+; GFX-950-NEXT:    s_or_b64 vcc, vcc, s[0:1]
 ; GFX-950-NEXT:    v_cndmask_b32_e32 v0, v0, v6, vcc
-; GFX-950-NEXT:    s_brev_b32 s0, 1
-; GFX-950-NEXT:    v_and_or_b32 v0, v1, s0, v0
----------------
jayfoad wrote:

This is probably the easiest place to see the effect of this patch - it just removes these two instructions.

https://github.com/llvm/llvm-project/pull/134988