[llvm] [WIP] Separate Asan instrumentation in amdgpu-sw-lower-lds. (PR #134832)

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``````````bash
git-clang-format --diff HEAD~1 HEAD --extensions cpp -- llvm/lib/Target/AMDGPU/AMDGPUSwLowerLDS.cpp
``````````

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View the diff from clang-format here.
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``````````diff
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUSwLowerLDS.cpp b/llvm/lib/Target/AMDGPU/AMDGPUSwLowerLDS.cpp
index 05f99c25d..7ff1b3ba6 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUSwLowerLDS.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUSwLowerLDS.cpp
@@ -440,8 +440,10 @@ void AMDGPUSwLowerLDS::populateSwMetadataGlobal(Function *Func) {
           Constant *ItemStartOffset = ConstantInt::get(Int32Ty, MallocSize);
           Constant *SizeInBytesConst = ConstantInt::get(Int32Ty, SizeInBytes);
           // Get redzone size corresponding a size.
-          const uint64_t RightRedzoneSize = AsanInstrumentLDS ?
-              AMDGPU::getRedzoneSizeForGlobal(AsanScale, SizeInBytes) : 0;
+          const uint64_t RightRedzoneSize =
+              AsanInstrumentLDS
+                  ? AMDGPU::getRedzoneSizeForGlobal(AsanScale, SizeInBytes)
+                  : 0;
           // Update MallocSize with current size and redzone size.
           MallocSize += SizeInBytes;
           if (!AMDGPU::isDynamicLDS(*GV))
@@ -878,23 +880,23 @@ void AMDGPUSwLowerLDS::lowerKernelLDSAccesses(Function *Func,
   Value *MallocPtr;
   if (AsanInstrumentLDS) {
     Value *ReturnAddress =
-      IRB.CreateIntrinsic(Intrinsic::returnaddress, {}, {IRB.getInt32(0)});
+        IRB.CreateIntrinsic(Intrinsic::returnaddress, {}, {IRB.getInt32(0)});
     FunctionCallee MallocFunc = M.getOrInsertFunction(
-      StringRef("__asan_malloc_impl"),
-      FunctionType::get(Int64Ty, {Int64Ty, Int64Ty}, false));
+        StringRef("__asan_malloc_impl"),
+        FunctionType::get(Int64Ty, {Int64Ty, Int64Ty}, false));
     Value *RAPtrToInt = IRB.CreatePtrToInt(ReturnAddress, Int64Ty);
-    Value *MallocCall = IRB.CreateCall(MallocFunc, {CurrMallocSize, RAPtrToInt});
+    Value *MallocCall =
+        IRB.CreateCall(MallocFunc, {CurrMallocSize, RAPtrToInt});
     MallocPtr =
-      IRB.CreateIntToPtr(MallocCall, IRB.getPtrTy(AMDGPUAS::GLOBAL_ADDRESS));
-  }
-  else {
+        IRB.CreateIntToPtr(MallocCall, IRB.getPtrTy(AMDGPUAS::GLOBAL_ADDRESS));
+  } else {
     Type *PtrTy = IRB.getPtrTy(AMDGPUAS::GLOBAL_ADDRESS);
-    FunctionCallee MallocFunc = M.getOrInsertFunction(
-      StringRef("__ockl_dm_alloc"),
-      FunctionType::get(PtrTy, {Int64Ty}, false));
+    FunctionCallee MallocFunc =
+        M.getOrInsertFunction(StringRef("__ockl_dm_alloc"),
+                              FunctionType::get(PtrTy, {Int64Ty}, false));
     Value *MallocCall = IRB.CreateCall(MallocFunc, {CurrMallocSize});
     MallocPtr =
-      IRB.CreateIntToPtr(MallocCall, IRB.getPtrTy(AMDGPUAS::GLOBAL_ADDRESS));
+        IRB.CreateIntToPtr(MallocCall, IRB.getPtrTy(AMDGPUAS::GLOBAL_ADDRESS));
   }
 
   // Create store of malloc to new global
@@ -953,17 +955,16 @@ void AMDGPUSwLowerLDS::lowerKernelLDSAccesses(Function *Func,
   Value *MallocPtrToInt = IRB.CreatePtrToInt(LoadMallocPtr, Int64Ty);
   if (AsanInstrumentLDS) {
     FunctionCallee AsanFreeFunc = M.getOrInsertFunction(
-      StringRef("__asan_free_impl"),
-      FunctionType::get(IRB.getVoidTy(), {Int64Ty, Int64Ty}, false));
+        StringRef("__asan_free_impl"),
+        FunctionType::get(IRB.getVoidTy(), {Int64Ty, Int64Ty}, false));
     Value *ReturnAddr =
-      IRB.CreateIntrinsic(Intrinsic::returnaddress, {}, IRB.getInt32(0));
+        IRB.CreateIntrinsic(Intrinsic::returnaddress, {}, IRB.getInt32(0));
     Value *RAPToInt = IRB.CreatePtrToInt(ReturnAddr, Int64Ty);
     IRB.CreateCall(AsanFreeFunc, {MallocPtrToInt, RAPToInt});
-  }
-  else {
+  } else {
     FunctionCallee FreeFunc = M.getOrInsertFunction(
-      StringRef("__ockl_dm_dealloc"),
-      FunctionType::get(IRB.getVoidTy(), {Int64Ty}, false));
+        StringRef("__ockl_dm_dealloc"),
+        FunctionType::get(IRB.getVoidTy(), {Int64Ty}, false));
     IRB.CreateCall(FreeFunc, {MallocPtrToInt});
   }
 

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https://github.com/llvm/llvm-project/pull/134832