[llvm] [MIPS] Add Scheduling model for MIPS i6400 and i6500 CPUs (PR #132704)
Mallikarjuna Gouda via llvm-commits
llvm-commits at lists.llvm.org
Wed Mar 26 00:25:03 PDT 2025
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@@ -0,0 +1,105 @@
+# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
+# RUN: llvm-mca -mtriple=mips64el -mcpu=i6400 -timeline -iterations=1 < %s | FileCheck %s
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mgoudar wrote:
I wanted to test dispatch and execute timeline. do you suggest to remove --timeline from this test?
https://github.com/llvm/llvm-project/pull/132704
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