[llvm] Houngkoungting patch 1 (PR #132927)

[via llvm-commits]

https://github.com/houngkoungting updated https://github.com/llvm/llvm-project/pull/132927

>From 69c1f2776efc5b6b413712dc396fa1eb0650f3a9 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?=E9=BB=83=E5=9C=8B=E5=BA=AD?=
 <37643576+houngkoungting at users.noreply.github.com>
Date: Sat, 15 Mar 2025 23:14:33 +0800
Subject: [PATCH 1/4] Update InstCombineShifts.cpp

---
 llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp b/llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp
index 90cd279e8a457..8404629810918 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp
@@ -994,6 +994,11 @@ static bool setShiftFlags(BinaryOperator &I, const SimplifyQuery &Q) {
       I.setIsExact();
       return true;
     }
+      // shr X, cttz(X)
+    if (match(I.getOperand(1), m_Intrinsic<Intrinsic::cttz>(m_Specific(I.getOperand(0))))) {
+      I.setIsExact();
+      return true;
+    }
   }
 
   // Compute what we know about shift count.

>From a5e73a03430cf2218aa23a3e89150fb6d474a4be Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?=E9=BB=83=E5=9C=8B=E5=BA=AD?=
 <37643576+houngkoungting at users.noreply.github.com>
Date: Sat, 15 Mar 2025 23:33:20 +0800
Subject: [PATCH 2/4] Update InstCombineShifts.cpp

---
 llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp | 6 +-----
 1 file changed, 1 insertion(+), 5 deletions(-)

diff --git a/llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp b/llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp
index 8404629810918..e73bd002b8dc0 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp
@@ -994,11 +994,7 @@ static bool setShiftFlags(BinaryOperator &I, const SimplifyQuery &Q) {
       I.setIsExact();
       return true;
     }
-      // shr X, cttz(X)
-    if (match(I.getOperand(1), m_Intrinsic<Intrinsic::cttz>(m_Specific(I.getOperand(0))))) {
-      I.setIsExact();
-      return true;
-    }
+ 
   }
 
   // Compute what we know about shift count.

>From dbfb142ac0683cedab4345e55a6764de12df0261 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?=E9=BB=83=E5=9C=8B=E5=BA=AD?=
 <37643576+houngkoungting at users.noreply.github.com>
Date: Tue, 25 Mar 2025 20:30:39 +0800
Subject: [PATCH 3/4] Update MachineCopyPropagation.cpp

Here's a fix for this issue(#131478). Let me know if any changes are needed!  from  @houngkoungting
---
 llvm/lib/CodeGen/MachineCopyPropagation.cpp | 20 +++++++++++++++++---
 1 file changed, 17 insertions(+), 3 deletions(-)

diff --git a/llvm/lib/CodeGen/MachineCopyPropagation.cpp b/llvm/lib/CodeGen/MachineCopyPropagation.cpp
index ff75b87b23128..8b241469d4300 100644
--- a/llvm/lib/CodeGen/MachineCopyPropagation.cpp
+++ b/llvm/lib/CodeGen/MachineCopyPropagation.cpp
@@ -1201,9 +1201,23 @@ void MachineCopyPropagation::BackwardCopyPropagateBlock(
     std::optional<DestSourcePair> CopyOperands =
         isCopyInstr(MI, *TII, UseCopyInstr);
     if (CopyOperands) {
-      Register DefReg = CopyOperands->Destination->getReg();
-      Register SrcReg = CopyOperands->Source->getReg();
-
+      bool isRISCV = (MBB.getParent()->getSubtarget().getTargetTriple().getArchName() == "riscv64" ||MBB.getParent()->getSubtarget().getTargetTriple().getArchName() == "riscv32");
+      Register DefReg;
+      Register SrcReg;
+      
+      if (isRISCV) { 
+        DefReg = CopyOperands->Destination->getReg();
+        SrcReg = CopyOperands->Source->getReg();
+        }
+       else { 
+        if (MI.getNumOperands() == 2) {   
+          DefReg = CopyOperands->Destination->getReg();
+          SrcReg = CopyOperands->Source->getReg();
+          
+         }
+       }
+
+      
       if (!TRI->regsOverlap(DefReg, SrcReg)) {
         // Unlike forward cp, we don't invoke propagateDefs here,
         // just let forward cp do COPY-to-COPY propagation.

>From 0877b1eba1aede3cea70d4e4bd5e8d3f1c07292d Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?=E9=BB=83=E5=9C=8B=E5=BA=AD?=
 <37643576+houngkoungting at users.noreply.github.com>
Date: Tue, 25 Mar 2025 20:58:45 +0800
Subject: [PATCH 4/4] Update InstCombineShifts.cpp

---
 llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp | 1 -
 1 file changed, 1 deletion(-)

diff --git a/llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp b/llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp
index e73bd002b8dc0..90cd279e8a457 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp
@@ -994,7 +994,6 @@ static bool setShiftFlags(BinaryOperator &I, const SimplifyQuery &Q) {
       I.setIsExact();
       return true;
     }
- 
   }
 
   // Compute what we know about shift count.