[llvm] [MIPS] Add Scheduling model for MIPS i6400 and i6500 CPUs (PR #132704)
Min-Yih Hsu via llvm-commits
llvm-commits at lists.llvm.org
Mon Mar 24 10:23:13 PDT 2025
================
@@ -0,0 +1,105 @@
+# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
+# RUN: llvm-mca -mtriple=mips64el -mcpu=i6400 -timeline -iterations=1 < %s | FileCheck %s
----------------
mshockwave wrote:
we don't usually need `-timeline` for scheduling model tests. Is there a specific reason you want to show timeline information here?
https://github.com/llvm/llvm-project/pull/132704
More information about the llvm-commits
mailing list