[llvm] [CodeGen] Use *Set::insert_range (NFC) (PR #132651)
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Sun Mar 23 18:22:57 PDT 2025
llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-debuginfo
@llvm/pr-subscribers-llvm-globalisel
Author: Kazu Hirata (kazutakahirata)
<details>
<summary>Changes</summary>
We can use *Set::insert_range to collapse:
for (auto Elem : Range)
Set.insert(E);
down to:
Set.insert_range(Range);
---
Full diff: https://github.com/llvm/llvm-project/pull/132651.diff
10 Files Affected:
- (modified) llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp (+2-4)
- (modified) llvm/lib/CodeGen/CodeGenPrepare.cpp (+1-2)
- (modified) llvm/lib/CodeGen/GlobalISel/LoadStoreOpt.cpp (+1-2)
- (modified) llvm/lib/CodeGen/IfConversion.cpp (+3-6)
- (modified) llvm/lib/CodeGen/IndirectBrExpandPass.cpp (+1-2)
- (modified) llvm/lib/CodeGen/LiveDebugValues/InstrRefBasedImpl.cpp (+1-2)
- (modified) llvm/lib/CodeGen/LiveVariables.cpp (+7-14)
- (modified) llvm/lib/CodeGen/MachinePipeliner.cpp (+1-2)
- (modified) llvm/lib/CodeGen/MachineVerifier.cpp (+3-6)
- (modified) llvm/lib/CodeGen/SjLjEHPrepare.cpp (+1-2)
``````````diff
diff --git a/llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp b/llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
index a78f606e62b29..39f1299a24e81 100644
--- a/llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
+++ b/llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
@@ -694,8 +694,7 @@ static void interpretValues(const MachineInstr *CurMI,
for (auto &FwdReg : ForwardedRegWorklist)
if (TRI.regsOverlap(FwdReg.first, MO.getReg()))
Defs.insert(FwdReg.first);
- for (MCRegUnit Unit : TRI.regunits(MO.getReg()))
- NewClobberedRegUnits.insert(Unit);
+ NewClobberedRegUnits.insert_range(TRI.regunits(MO.getReg()));
}
}
};
@@ -2380,8 +2379,7 @@ void DwarfDebug::findForceIsStmtInstrs(const MachineFunction *MF) {
continue;
for (auto &MI : MBB) {
if (MI.getDebugLoc() && MI.getDebugLoc()->getLine()) {
- for (auto *Pred : MBB.predecessors())
- PredMBBsToExamine.insert(Pred);
+ PredMBBsToExamine.insert_range(MBB.predecessors());
PotentialIsStmtMBBInstrs.insert({&MBB, &MI});
break;
}
diff --git a/llvm/lib/CodeGen/CodeGenPrepare.cpp b/llvm/lib/CodeGen/CodeGenPrepare.cpp
index e3d6a5e891f8e..5ec7000fd0aad 100644
--- a/llvm/lib/CodeGen/CodeGenPrepare.cpp
+++ b/llvm/lib/CodeGen/CodeGenPrepare.cpp
@@ -6809,8 +6809,7 @@ bool CodeGenPrepare::optimizePhiType(
}
// Save the removed phis to be deleted later.
- for (PHINode *Phi : PhiNodes)
- DeletedInstrs.insert(Phi);
+ DeletedInstrs.insert_range(PhiNodes);
return true;
}
diff --git a/llvm/lib/CodeGen/GlobalISel/LoadStoreOpt.cpp b/llvm/lib/CodeGen/GlobalISel/LoadStoreOpt.cpp
index 4557b3fbed611..0e908fa407fe8 100644
--- a/llvm/lib/CodeGen/GlobalISel/LoadStoreOpt.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/LoadStoreOpt.cpp
@@ -431,8 +431,7 @@ bool LoadStoreOpt::doSingleStoreMerge(SmallVectorImpl<GStore *> &Stores) {
return R;
});
- for (auto *MI : Stores)
- InstsToErase.insert(MI);
+ InstsToErase.insert_range(Stores);
return true;
}
diff --git a/llvm/lib/CodeGen/IfConversion.cpp b/llvm/lib/CodeGen/IfConversion.cpp
index 2ea086e53a5df..3fff48d7ae4ca 100644
--- a/llvm/lib/CodeGen/IfConversion.cpp
+++ b/llvm/lib/CodeGen/IfConversion.cpp
@@ -1943,16 +1943,13 @@ bool IfConverter::IfConvertDiamondCommon(
} else if (!RedefsByFalse.count(Reg)) {
// These are defined before ctrl flow reach the 'false' instructions.
// They cannot be modified by the 'true' instructions.
- for (MCPhysReg SubReg : TRI->subregs_inclusive(Reg))
- ExtUses.insert(SubReg);
+ ExtUses.insert_range(TRI->subregs_inclusive(Reg));
}
}
for (MCRegister Reg : Defs) {
- if (!ExtUses.count(Reg)) {
- for (MCPhysReg SubReg : TRI->subregs_inclusive(Reg))
- RedefsByFalse.insert(SubReg);
- }
+ if (!ExtUses.count(Reg))
+ RedefsByFalse.insert_range(TRI->subregs_inclusive(Reg));
}
}
}
diff --git a/llvm/lib/CodeGen/IndirectBrExpandPass.cpp b/llvm/lib/CodeGen/IndirectBrExpandPass.cpp
index 05a7387b1232c..15f24207458cf 100644
--- a/llvm/lib/CodeGen/IndirectBrExpandPass.cpp
+++ b/llvm/lib/CodeGen/IndirectBrExpandPass.cpp
@@ -119,8 +119,7 @@ bool runImpl(Function &F, const TargetLowering *TLI, DomTreeUpdater *DTU) {
}
IndirectBrs.push_back(IBr);
- for (BasicBlock *SuccBB : IBr->successors())
- IndirectBrSuccs.insert(SuccBB);
+ IndirectBrSuccs.insert_range(IBr->successors());
}
if (IndirectBrs.empty())
diff --git a/llvm/lib/CodeGen/LiveDebugValues/InstrRefBasedImpl.cpp b/llvm/lib/CodeGen/LiveDebugValues/InstrRefBasedImpl.cpp
index fb688a231f522..9f11ccf21bd1f 100644
--- a/llvm/lib/CodeGen/LiveDebugValues/InstrRefBasedImpl.cpp
+++ b/llvm/lib/CodeGen/LiveDebugValues/InstrRefBasedImpl.cpp
@@ -900,8 +900,7 @@ class TransferTracker {
// Commit ActiveMLoc changes.
ActiveMLocIt->second.clear();
if (!NewMLocs.empty())
- for (DebugVariableID VarID : NewMLocs)
- ActiveMLocs[*NewLoc].insert(VarID);
+ ActiveMLocs[*NewLoc].insert_range(NewMLocs);
}
/// Transfer variables based on \p Src to be based on \p Dst. This handles
diff --git a/llvm/lib/CodeGen/LiveVariables.cpp b/llvm/lib/CodeGen/LiveVariables.cpp
index 4c1ff3f2d0dd4..ab95200af00e0 100644
--- a/llvm/lib/CodeGen/LiveVariables.cpp
+++ b/llvm/lib/CodeGen/LiveVariables.cpp
@@ -241,10 +241,8 @@ LiveVariables::FindLastPartialDef(Register Reg,
if (MO.getReg() == 0)
continue;
Register DefReg = MO.getReg();
- if (TRI->isSubRegister(Reg, DefReg)) {
- for (MCPhysReg SubReg : TRI->subregs_inclusive(DefReg))
- PartDefRegs.insert(SubReg);
- }
+ if (TRI->isSubRegister(Reg, DefReg))
+ PartDefRegs.insert_range(TRI->subregs_inclusive(DefReg));
}
return LastDef;
}
@@ -283,8 +281,7 @@ void LiveVariables::HandlePhysRegUse(Register Reg, MachineInstr &MI) {
false/*IsDef*/,
true/*IsImp*/));
PhysRegDef[SubReg] = LastPartialDef;
- for (MCPhysReg SS : TRI->subregs(SubReg))
- Processed.insert(SS);
+ Processed.insert_range(TRI->subregs(SubReg));
}
}
} else if (LastDef && !PhysRegUse[Reg.id()] &&
@@ -370,8 +367,7 @@ bool LiveVariables::HandlePhysRegKill(Register Reg, MachineInstr *MI) {
continue;
}
if (MachineInstr *Use = PhysRegUse[SubReg]) {
- for (MCPhysReg SS : TRI->subregs_inclusive(SubReg))
- PartUses.insert(SS);
+ PartUses.insert_range(TRI->subregs_inclusive(SubReg));
unsigned Dist = DistanceMap[Use];
if (Dist > LastRefOrPartRefDist) {
LastRefOrPartRefDist = Dist;
@@ -465,8 +461,7 @@ void LiveVariables::HandlePhysRegDef(Register Reg, MachineInstr *MI,
// What parts of the register are previously defined?
SmallSet<unsigned, 32> Live;
if (PhysRegDef[Reg.id()] || PhysRegUse[Reg.id()]) {
- for (MCPhysReg SubReg : TRI->subregs_inclusive(Reg))
- Live.insert(SubReg);
+ Live.insert_range(TRI->subregs_inclusive(Reg));
} else {
for (MCPhysReg SubReg : TRI->subregs(Reg)) {
// If a register isn't itself defined, but all parts that make up of it
@@ -477,10 +472,8 @@ void LiveVariables::HandlePhysRegDef(Register Reg, MachineInstr *MI,
// = AX
if (Live.count(SubReg))
continue;
- if (PhysRegDef[SubReg] || PhysRegUse[SubReg]) {
- for (MCPhysReg SS : TRI->subregs_inclusive(SubReg))
- Live.insert(SS);
- }
+ if (PhysRegDef[SubReg] || PhysRegUse[SubReg])
+ Live.insert_range(TRI->subregs_inclusive(SubReg));
}
}
diff --git a/llvm/lib/CodeGen/MachinePipeliner.cpp b/llvm/lib/CodeGen/MachinePipeliner.cpp
index 99d582cc115d1..6cb0299a30d7a 100644
--- a/llvm/lib/CodeGen/MachinePipeliner.cpp
+++ b/llvm/lib/CodeGen/MachinePipeliner.cpp
@@ -1993,8 +1993,7 @@ static void computeLiveOuts(MachineFunction &MF, RegPressureTracker &RPTracker,
if (Reg.isVirtual())
Uses.insert(Reg);
else if (MRI.isAllocatable(Reg))
- for (MCRegUnit Unit : TRI->regunits(Reg.asMCReg()))
- Uses.insert(Unit);
+ Uses.insert_range(TRI->regunits(Reg.asMCReg()));
}
}
for (SUnit *SU : NS)
diff --git a/llvm/lib/CodeGen/MachineVerifier.cpp b/llvm/lib/CodeGen/MachineVerifier.cpp
index 4484a3fc05208..a7dbceb88c4c8 100644
--- a/llvm/lib/CodeGen/MachineVerifier.cpp
+++ b/llvm/lib/CodeGen/MachineVerifier.cpp
@@ -907,17 +907,14 @@ MachineVerifier::visitMachineBasicBlockBefore(const MachineBasicBlock *MBB) {
report("MBB live-in list contains non-physical register", MBB);
continue;
}
- for (const MCPhysReg &SubReg : TRI->subregs_inclusive(LI.PhysReg))
- regsLive.insert(SubReg);
+ regsLive.insert_range(TRI->subregs_inclusive(LI.PhysReg));
}
}
const MachineFrameInfo &MFI = MF->getFrameInfo();
BitVector PR = MFI.getPristineRegs(*MF);
- for (unsigned I : PR.set_bits()) {
- for (const MCPhysReg &SubReg : TRI->subregs_inclusive(I))
- regsLive.insert(SubReg);
- }
+ for (unsigned I : PR.set_bits())
+ regsLive.insert_range(TRI->subregs_inclusive(I));
regsKilled.clear();
regsDefined.clear();
diff --git a/llvm/lib/CodeGen/SjLjEHPrepare.cpp b/llvm/lib/CodeGen/SjLjEHPrepare.cpp
index c33afdc71e78b..294b3de46966f 100644
--- a/llvm/lib/CodeGen/SjLjEHPrepare.cpp
+++ b/llvm/lib/CodeGen/SjLjEHPrepare.cpp
@@ -150,8 +150,7 @@ static void MarkBlocksLiveIn(BasicBlock *BB,
if (!LiveBBs.insert(BB).second)
return; // already been here.
- for (BasicBlock *B : inverse_depth_first(BB))
- LiveBBs.insert(B);
+ LiveBBs.insert_range(inverse_depth_first(BB));
}
/// substituteLPadValues - Substitute the values returned by the landingpad
``````````
</details>
https://github.com/llvm/llvm-project/pull/132651
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