[llvm] [X86][GlobalISel] Added support for SQRT function (PR #132356)
via llvm-commits
llvm-commits at lists.llvm.org
Sun Mar 23 03:45:34 PDT 2025
https://github.com/JaydeepChauhan14 updated https://github.com/llvm/llvm-project/pull/132356
>From 8bb7fedae94de80cfee3645df71796f369383593 Mon Sep 17 00:00:00 2001
From: Chauhan Jaydeep Ashwinbhai <chauhan.jaydeep.ashwinbhai at intel.com>
Date: Fri, 21 Mar 2025 02:00:59 -0700
Subject: [PATCH 1/3] [X86][GlobalISel] Added support for SQRT function
---
.../lib/Target/X86/GISel/X86LegalizerInfo.cpp | 5 ++
.../Target/X86/GISel/X86RegisterBankInfo.cpp | 1 +
llvm/test/CodeGen/X86/GlobalISel/sqrt.mir | 68 +++++++++++++++++++
llvm/test/CodeGen/X86/isel-sqrt.ll | 19 +++---
4 files changed, 84 insertions(+), 9 deletions(-)
create mode 100644 llvm/test/CodeGen/X86/GlobalISel/sqrt.mir
diff --git a/llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp b/llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp
index 24bf0dd378641..b474d6a3f6356 100644
--- a/llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp
+++ b/llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp
@@ -105,6 +105,11 @@ X86LegalizerInfo::X86LegalizerInfo(const X86Subtarget &STI,
G_FEXP10, G_FLOG, G_FLOG2, G_FLOG10})
.libcall();
+ getActionDefinitionsBuilder(G_FSQRT)
+ .legalFor(HasSSE1 || UseX87, {s32})
+ .legalFor(HasSSE2 || UseX87, {s64})
+ .legalFor(UseX87, {s80});
+
// merge/unmerge
for (unsigned Op : {G_MERGE_VALUES, G_UNMERGE_VALUES}) {
unsigned BigTyIdx = Op == G_MERGE_VALUES ? 0 : 1;
diff --git a/llvm/lib/Target/X86/GISel/X86RegisterBankInfo.cpp b/llvm/lib/Target/X86/GISel/X86RegisterBankInfo.cpp
index 42faf4299c6d5..0baca81494694 100644
--- a/llvm/lib/Target/X86/GISel/X86RegisterBankInfo.cpp
+++ b/llvm/lib/Target/X86/GISel/X86RegisterBankInfo.cpp
@@ -288,6 +288,7 @@ X86RegisterBankInfo::getInstrMapping(const MachineInstr &MI) const {
SmallVector<PartialMappingIdx, 4> OpRegBankIdx(NumOperands);
switch (Opc) {
+ case TargetOpcode::G_FSQRT:
case TargetOpcode::G_FPEXT:
case TargetOpcode::G_FPTRUNC:
case TargetOpcode::G_FCONSTANT:
diff --git a/llvm/test/CodeGen/X86/GlobalISel/sqrt.mir b/llvm/test/CodeGen/X86/GlobalISel/sqrt.mir
new file mode 100644
index 0000000000000..b55a9f8dceca0
--- /dev/null
+++ b/llvm/test/CodeGen/X86/GlobalISel/sqrt.mir
@@ -0,0 +1,68 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
+# RUN: llc -mtriple=i686-linux-gnu -run-pass=regbankselect,instruction-select -disable-gisel-legality-check -global-isel -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes GISEL-I686
+
+---
+name: test_sqrt_f32
+alignment: 16
+legalized: true
+fixedStack:
+ - { id: 0, type: default, offset: 0, size: 4, alignment: 16, stack-id: default,
+ isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
+ debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
+body: |
+ bb.1:
+ ; GISEL-I686-LABEL: name: test_sqrt_f32
+ ; GISEL-I686: [[LD_Fp32m:%[0-9]+]]:rfp32 = LD_Fp32m %fixed-stack.0, 1, $noreg, 0, $noreg, implicit-def $fpsw, implicit $fpcw :: (invariant load (s32) from %fixed-stack.0, align 16)
+ ; GISEL-I686-NEXT: [[SQRT_Fp32_:%[0-9]+]]:rfp32 = nofpexcept SQRT_Fp32 [[LD_Fp32m]], implicit-def dead $fpsw, implicit $fpcw
+ ; GISEL-I686-NEXT: $fp0 = COPY [[SQRT_Fp32_]]
+ ; GISEL-I686-NEXT: RET 0, implicit $fp0
+ %1:_(p0) = G_FRAME_INDEX %fixed-stack.0
+ %0:_(s32) = G_LOAD %1(p0) :: (invariant load (s32) from %fixed-stack.0, align 16)
+ %2:_(s32) = G_FSQRT %0
+ $fp0 = COPY %2(s32)
+ RET 0, implicit $fp0
+
+...
+---
+name: test_sqrt_f64
+alignment: 16
+legalized: true
+fixedStack:
+ - { id: 0, type: default, offset: 0, size: 8, alignment: 16, stack-id: default,
+ isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
+ debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
+body: |
+ bb.1:
+ ; GISEL-I686-LABEL: name: test_sqrt_f64
+ ; GISEL-I686: [[DEF:%[0-9]+]]:rfp64 = IMPLICIT_DEF
+ ; GISEL-I686-NEXT: [[SQRT_Fp64_:%[0-9]+]]:rfp64 = nofpexcept SQRT_Fp64 [[DEF]], implicit-def dead $fpsw, implicit $fpcw
+ ; GISEL-I686-NEXT: $fp0 = COPY [[SQRT_Fp64_]]
+ ; GISEL-I686-NEXT: RET 0, implicit $fp0
+ %0:_(s64) = IMPLICIT_DEF
+ %2:_(s64) = G_FSQRT %0
+ $fp0 = COPY %2(s64)
+ RET 0, implicit $fp0
+
+...
+---
+name: test_sqrt_f80
+alignment: 16
+legalized: true
+fixedStack:
+ - { id: 0, type: default, offset: 0, size: 10, alignment: 16, stack-id: default,
+ isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
+ debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
+body: |
+ bb.1:
+ ; GISEL-I686-LABEL: name: test_sqrt_f80
+ ; GISEL-I686: [[LD_Fp80m:%[0-9]+]]:rfp80 = LD_Fp80m %fixed-stack.0, 1, $noreg, 0, $noreg, implicit-def $fpsw, implicit $fpcw :: (invariant load (s80) from %fixed-stack.0, align 16)
+ ; GISEL-I686-NEXT: [[SQRT_Fp80_:%[0-9]+]]:rfp80 = nofpexcept SQRT_Fp80 [[LD_Fp80m]], implicit-def dead $fpsw, implicit $fpcw
+ ; GISEL-I686-NEXT: $fp0 = COPY [[SQRT_Fp80_]]
+ ; GISEL-I686-NEXT: RET 0, implicit $fp0
+ %1:_(p0) = G_FRAME_INDEX %fixed-stack.0
+ %0:_(s80) = G_LOAD %1(p0) :: (invariant load (s80) from %fixed-stack.0, align 16)
+ %2:_(s80) = G_FSQRT %0
+ $fp0 = COPY %2(s80)
+ RET 0, implicit $fp0
+
+...
diff --git a/llvm/test/CodeGen/X86/isel-sqrt.ll b/llvm/test/CodeGen/X86/isel-sqrt.ll
index 9ac68a11d748c..7204e37347618 100644
--- a/llvm/test/CodeGen/X86/isel-sqrt.ll
+++ b/llvm/test/CodeGen/X86/isel-sqrt.ll
@@ -1,13 +1,14 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=-avx,+sse2 | FileCheck %s --check-prefixes=X64,SSE2
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=-avx,+sse2 -fast-isel | FileCheck %s --check-prefixes=X64,SSE2
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=-avx,+sse2 -global-isel -global-isel-abort=2 | FileCheck %s --check-prefixes=X64,SSE2
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=-avx2,+avx | FileCheck %s --check-prefixes=X64,AVX
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=-avx2,+avx -fast-isel | FileCheck %s --check-prefixes=X64,AVX
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=-avx2,+avx -global-isel -global-isel-abort=2 | FileCheck %s --check-prefixes=X64,AVX
-; RUN: llc < %s -mtriple=i686-linux-gnu -global-isel=0 -fast-isel=0 | FileCheck %s --check-prefixes=X86,SDAG-X86
-; RUN: llc < %s -mtriple=i686-linux-gnu -fast-isel | FileCheck %s --check-prefixes=X86,FASTISEL-X86
-; RUN: llc < %s -mtriple=i686-linux-gnu -global-isel -global-isel-abort=2 | FileCheck %s --check-prefixes=X86,GISEL-X86
+; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=-avx,+sse2 | FileCheck %s --check-prefixes=X64,SSE2
+; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=-avx,+sse2 -fast-isel | FileCheck %s --check-prefixes=X64,SSE2
+; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=-avx,+sse2 -global-isel | FileCheck %s --check-prefixes=X64,SSE2
+; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=-avx2,+avx | FileCheck %s --check-prefixes=X64,AVX
+; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=-avx2,+avx -fast-isel | FileCheck %s --check-prefixes=X64,AVX
+; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=-avx2,+avx -global-isel | FileCheck %s --check-prefixes=X64,AVX
+; RUN: llc < %s -mtriple=i686-linux-gnu -global-isel=0 -fast-isel=0 | FileCheck %s --check-prefixes=X86,SDAG-X86
+; RUN: llc < %s -mtriple=i686-linux-gnu -fast-isel | FileCheck %s --check-prefixes=X86,FASTISEL-X86
+; TODO: The last RUN line will fails GISEL selection and will fallback to DAG selection due to lack of support for loads/stores in i686 mode, support is expected soon enough, for this reason the llvm/test/CodeGen/X86/GlobalISel/sqrt.mir test is added for now because of the lack of support for i686 in GlobalISel.
+; RUN: llc < %s -mtriple=i686-linux-gnu -global-isel -global-isel-abort=2 | FileCheck %s --check-prefixes=X86,GISEL-X86
define float @test_sqrt_f32(float %a) {
; SSE2-LABEL: test_sqrt_f32:
>From 120859c4febeebafedd0ea5eccdfacee1d23d27a Mon Sep 17 00:00:00 2001
From: Chauhan Jaydeep Ashwinbhai <chauhan.jaydeep.ashwinbhai at intel.com>
Date: Fri, 21 Mar 2025 05:35:33 -0700
Subject: [PATCH 2/3] Updated the testcase check
---
llvm/test/CodeGen/X86/isel-sqrt.ll | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/llvm/test/CodeGen/X86/isel-sqrt.ll b/llvm/test/CodeGen/X86/isel-sqrt.ll
index 7204e37347618..45ac3bdb2e40b 100644
--- a/llvm/test/CodeGen/X86/isel-sqrt.ll
+++ b/llvm/test/CodeGen/X86/isel-sqrt.ll
@@ -1,10 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=-avx,+sse2 | FileCheck %s --check-prefixes=X64,SSE2
; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=-avx,+sse2 -fast-isel | FileCheck %s --check-prefixes=X64,SSE2
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=-avx,+sse2 -global-isel | FileCheck %s --check-prefixes=X64,SSE2
+; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=-avx,+sse2 -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=X64,SSE2
; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=-avx2,+avx | FileCheck %s --check-prefixes=X64,AVX
; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=-avx2,+avx -fast-isel | FileCheck %s --check-prefixes=X64,AVX
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=-avx2,+avx -global-isel | FileCheck %s --check-prefixes=X64,AVX
+; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=-avx2,+avx -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=X64,AVX
; RUN: llc < %s -mtriple=i686-linux-gnu -global-isel=0 -fast-isel=0 | FileCheck %s --check-prefixes=X86,SDAG-X86
; RUN: llc < %s -mtriple=i686-linux-gnu -fast-isel | FileCheck %s --check-prefixes=X86,FASTISEL-X86
; TODO: The last RUN line will fails GISEL selection and will fallback to DAG selection due to lack of support for loads/stores in i686 mode, support is expected soon enough, for this reason the llvm/test/CodeGen/X86/GlobalISel/sqrt.mir test is added for now because of the lack of support for i686 in GlobalISel.
>From 2c82bf5dbab9b3d54d6423bbfd283fb68b1054e9 Mon Sep 17 00:00:00 2001
From: JaydeepChauhan14 <chauhan.jaydeep.ashwinbhai at intel.com>
Date: Sun, 23 Mar 2025 16:15:25 +0530
Subject: [PATCH 3/3] Update llvm/test/CodeGen/X86/GlobalISel/sqrt.mir
Addressed the review comments.
Co-authored-by: Matt Arsenault <arsenm2 at gmail.com>
---
llvm/test/CodeGen/X86/GlobalISel/sqrt.mir | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/llvm/test/CodeGen/X86/GlobalISel/sqrt.mir b/llvm/test/CodeGen/X86/GlobalISel/sqrt.mir
index b55a9f8dceca0..6c6786e449a1e 100644
--- a/llvm/test/CodeGen/X86/GlobalISel/sqrt.mir
+++ b/llvm/test/CodeGen/X86/GlobalISel/sqrt.mir
@@ -1,5 +1,5 @@
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
-# RUN: llc -mtriple=i686-linux-gnu -run-pass=regbankselect,instruction-select -disable-gisel-legality-check -global-isel -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes GISEL-I686
+# RUN: llc -mtriple=i686-linux-gnu -run-pass=regbankselect,instruction-select %s -o - | FileCheck %s --check-prefixes GISEL-I686
---
name: test_sqrt_f32
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