[llvm] [RISCV][Xqcili] Implement Load Immediate Support (PR #132496)

[Craig Topper via llvm-commits]

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@@ -57,6 +61,25 @@ static void generateInstSeqImpl(int64_t Val, const MCSubtargetInfo &STI,
     return;
   }
 
+  if (!IsRV64 && STI.hasFeature(RISCV::FeatureVendorXqcili)) {
+    bool FitsOneStandardInst =
+        ((Val & 0xFFF) == 0) || (((Val + 0x800) & 0xFFFFF000) == 0);
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topperc wrote:

I think is checking for ADDI and LUI, but I don't understand why there is a `+ 0x800` in the LUI check.

https://github.com/llvm/llvm-project/pull/132496