[llvm] f459cfe - [AMDGPU] Avoid repeated hash lookups (NFC) (#132511)

[via llvm-commits]

Author: Kazu Hirata
Date: 2025-03-21T22:15:40-07:00
New Revision: f459cfed7b017ab57b8e825fc0198f89288168a4

URL: https://github.com/llvm/llvm-project/commit/f459cfed7b017ab57b8e825fc0198f89288168a4
DIFF: https://github.com/llvm/llvm-project/commit/f459cfed7b017ab57b8e825fc0198f89288168a4.diff

LOG: [AMDGPU] Avoid repeated hash lookups (NFC) (#132511)

Added: 
    

Modified: 
    llvm/lib/Target/AMDGPU/GCNRegPressure.cpp

Removed: 
    


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diff  --git a/llvm/lib/Target/AMDGPU/GCNRegPressure.cpp b/llvm/lib/Target/AMDGPU/GCNRegPressure.cpp
index a438ad00bc41d..f74d12cfab0c0 100644
--- a/llvm/lib/Target/AMDGPU/GCNRegPressure.cpp
+++ b/llvm/lib/Target/AMDGPU/GCNRegPressure.cpp
@@ -692,8 +692,8 @@ GCNDownwardRPTracker::bumpDownwardPressure(const MachineInstr *MI,
     if (LastUseMask.none())
       continue;
 
-    LaneBitmask LiveMask =
-        LiveRegs.contains(Reg) ? LiveRegs.at(Reg) : LaneBitmask(0);
+    auto It = LiveRegs.find(Reg);
+    LaneBitmask LiveMask = It != LiveRegs.end() ? It->second : LaneBitmask(0);
     LaneBitmask NewMask = LiveMask & ~LastUseMask;
     TempPressure.inc(Reg, LiveMask, NewMask, *MRI);
   }
@@ -703,8 +703,8 @@ GCNDownwardRPTracker::bumpDownwardPressure(const MachineInstr *MI,
     Register Reg = Def.RegUnit;
     if (!Reg.isVirtual())
       continue;
-    LaneBitmask LiveMask =
-        LiveRegs.contains(Reg) ? LiveRegs.at(Reg) : LaneBitmask(0);
+    auto It = LiveRegs.find(Reg);
+    LaneBitmask LiveMask = It != LiveRegs.end() ? It->second : LaneBitmask(0);
     LaneBitmask NewMask = LiveMask | Def.LaneMask;
     TempPressure.inc(Reg, LiveMask, NewMask, *MRI);
   }