[clang] [llvm] [clang][IR] Overload @llvm.thread.pointer to support non-AS0 targets (PR #132489)
via llvm-commits
llvm-commits at lists.llvm.org
Fri Mar 21 16:20:58 PDT 2025
llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-llvm-transforms
Author: Jessica Clarke (jrtc27)
<details>
<summary>Changes</summary>
Thraed-local globals live, by default, in the default globals address
space, which may not be 0, so we need to overload @<!-- -->llvm.thread.pointer
to support other address spaces, and use the default globals address
space in Clang.
---
Patch is 27.20 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/132489.diff
21 Files Affected:
- (modified) clang/lib/CodeGen/CGBuiltin.cpp (+3-2)
- (modified) clang/test/CodeGen/builtins-arm64.c (+1-1)
- (modified) clang/test/CodeGen/builtins-wasm.c (+1-1)
- (modified) llvm/include/llvm/IR/Intrinsics.td (+1-1)
- (modified) llvm/lib/IR/AutoUpgrade.cpp (+10-2)
- (modified) llvm/lib/Target/AArch64/AArch64ISelLowering.cpp (+2-2)
- (modified) llvm/lib/Target/RISCV/RISCVISelLowering.cpp (+2-2)
- (modified) llvm/lib/Transforms/Utils/MemoryTaggingSupport.cpp (+3-2)
- (modified) llvm/test/Assembler/autoupgrade-thread-pointer.ll (+2-2)
- (modified) llvm/test/CodeGen/AArch64/stack-tagging-prologue.ll (+1-1)
- (modified) llvm/test/Instrumentation/HWAddressSanitizer/alloca-array.ll (+1-1)
- (modified) llvm/test/Instrumentation/HWAddressSanitizer/alloca-compat.ll (+1-1)
- (modified) llvm/test/Instrumentation/HWAddressSanitizer/alloca-with-calls.ll (+1-1)
- (modified) llvm/test/Instrumentation/HWAddressSanitizer/exception-lifetime.ll (+1-1)
- (modified) llvm/test/Instrumentation/HWAddressSanitizer/prologue.ll (+2-2)
- (modified) llvm/test/Instrumentation/HWAddressSanitizer/use-after-scope-setjmp.ll (+1-1)
- (modified) llvm/test/Instrumentation/HWAddressSanitizer/use-after-scope.ll (+20-20)
- (modified) llvm/test/Transforms/SafeStack/AArch64/abi.ll (+1-1)
- (modified) llvm/test/Transforms/SafeStack/AArch64/abi_ssp.ll (+2-2)
- (modified) llvm/test/Transforms/SafeStack/AArch64/unreachable.ll (+1-1)
- (modified) llvm/unittests/Transforms/Vectorize/VPlanTest.cpp (+2-1)
``````````diff
diff --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
index f0ba52fa41ce8..19fff5d0bdd2c 100644
--- a/clang/lib/CodeGen/CGBuiltin.cpp
+++ b/clang/lib/CodeGen/CGBuiltin.cpp
@@ -5905,8 +5905,9 @@ RValue CodeGenFunction::EmitBuiltinExpr(const GlobalDecl GD, unsigned BuiltinID,
case Builtin::BI__builtin_thread_pointer: {
if (!getContext().getTargetInfo().isTLSSupported())
CGM.ErrorUnsupported(E, "__builtin_thread_pointer");
- // Fall through - it's already mapped to the intrinsic by ClangBuiltin.
- break;
+
+ return RValue::get(Builder.CreateIntrinsic(llvm::Intrinsic::thread_pointer,
+ {GlobalsInt8PtrTy}, {}));
}
case Builtin::BI__builtin_os_log_format:
return emitBuiltinOSLogFormat(*E);
diff --git a/clang/test/CodeGen/builtins-arm64.c b/clang/test/CodeGen/builtins-arm64.c
index 0913295b0c5f5..86c2812434643 100644
--- a/clang/test/CodeGen/builtins-arm64.c
+++ b/clang/test/CodeGen/builtins-arm64.c
@@ -10,7 +10,7 @@ void f0(void *a, void *b) {
void *tp (void) {
return __builtin_thread_pointer ();
-// CHECK-LINUX: call {{.*}} @llvm.thread.pointer()
+// CHECK-LINUX: call {{.*}} @llvm.thread.pointer.p0()
}
// CHECK: call {{.*}} @llvm.bitreverse.i32(i32 %a)
diff --git a/clang/test/CodeGen/builtins-wasm.c b/clang/test/CodeGen/builtins-wasm.c
index 263cfd3ab4c69..34c0e3ab23b51 100644
--- a/clang/test/CodeGen/builtins-wasm.c
+++ b/clang/test/CodeGen/builtins-wasm.c
@@ -743,5 +743,5 @@ __externref_t externref_null() {
void *tp (void) {
return __builtin_thread_pointer ();
- // WEBASSEMBLY: call {{.*}} @llvm.thread.pointer()
+ // WEBASSEMBLY: call {{.*}} @llvm.thread.pointer.p0()
}
diff --git a/llvm/include/llvm/IR/Intrinsics.td b/llvm/include/llvm/IR/Intrinsics.td
index d10b07ccd91c2..4899ec6b75e57 100644
--- a/llvm/include/llvm/IR/Intrinsics.td
+++ b/llvm/include/llvm/IR/Intrinsics.td
@@ -882,7 +882,7 @@ def int_stackrestore : DefaultAttrsIntrinsic<[], [llvm_anyptr_ty]>,
def int_get_dynamic_area_offset : DefaultAttrsIntrinsic<[llvm_anyint_ty]>;
-def int_thread_pointer : DefaultAttrsIntrinsic<[llvm_ptr_ty], [], [IntrNoMem]>,
+def int_thread_pointer : DefaultAttrsIntrinsic<[llvm_anyptr_ty], [], [IntrNoMem]>,
ClangBuiltin<"__builtin_thread_pointer">;
// IntrInaccessibleMemOrArgMemOnly is a little more pessimistic than strictly
diff --git a/llvm/lib/IR/AutoUpgrade.cpp b/llvm/lib/IR/AutoUpgrade.cpp
index 9be307bb071ed..01b3aeeef4551 100644
--- a/llvm/lib/IR/AutoUpgrade.cpp
+++ b/llvm/lib/IR/AutoUpgrade.cpp
@@ -645,8 +645,8 @@ static bool upgradeArmOrAarch64IntrinsicFunction(bool IsArm, Function *F,
if (Name == "thread.pointer") {
// '(arm|aarch64).thread.pointer'.
- NewFn = Intrinsic::getOrInsertDeclaration(F->getParent(),
- Intrinsic::thread_pointer);
+ NewFn = Intrinsic::getOrInsertDeclaration(
+ F->getParent(), Intrinsic::thread_pointer, F->getReturnType());
return true;
}
@@ -1419,6 +1419,14 @@ static bool upgradeIntrinsicFunction1(Function *F, Function *&NewFn,
}
break;
+ case 't':
+ if (Name == "thread.pointer") {
+ NewFn = Intrinsic::getDeclaration(
+ F->getParent(), Intrinsic::thread_pointer, F->getReturnType());
+ return true;
+ }
+ break;
+
case 'v': {
if (Name == "var.annotation" && F->arg_size() == 4) {
rename(F);
diff --git a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
index 0db6c614684d7..49381f782cb73 100644
--- a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+++ b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
@@ -28166,8 +28166,8 @@ bool AArch64TargetLowering::shouldNormalizeToSelectSequence(LLVMContext &,
static Value *UseTlsOffset(IRBuilderBase &IRB, unsigned Offset) {
Module *M = IRB.GetInsertBlock()->getParent()->getParent();
- Function *ThreadPointerFunc =
- Intrinsic::getOrInsertDeclaration(M, Intrinsic::thread_pointer);
+ Function *ThreadPointerFunc = Intrinsic::getOrInsertDeclaration(
+ M, Intrinsic::thread_pointer, IRB.getPtrTy());
return IRB.CreatePointerCast(
IRB.CreateConstGEP1_32(IRB.getInt8Ty(), IRB.CreateCall(ThreadPointerFunc),
Offset),
diff --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
index 78ea3ea3738ae..fb8153865f00c 100644
--- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
@@ -22916,8 +22916,8 @@ bool RISCVTargetLowering::preferScalarizeSplat(SDNode *N) const {
static Value *useTpOffset(IRBuilderBase &IRB, unsigned Offset) {
Module *M = IRB.GetInsertBlock()->getModule();
- Function *ThreadPointerFunc =
- Intrinsic::getOrInsertDeclaration(M, Intrinsic::thread_pointer);
+ Function *ThreadPointerFunc = Intrinsic::getOrInsertDeclaration(
+ M, Intrinsic::thread_pointer, IRB.getPtrTy());
return IRB.CreateConstGEP1_32(IRB.getInt8Ty(),
IRB.CreateCall(ThreadPointerFunc), Offset);
}
diff --git a/llvm/lib/Transforms/Utils/MemoryTaggingSupport.cpp b/llvm/lib/Transforms/Utils/MemoryTaggingSupport.cpp
index de84a76ede7ff..511c15555fa83 100644
--- a/llvm/lib/Transforms/Utils/MemoryTaggingSupport.cpp
+++ b/llvm/lib/Transforms/Utils/MemoryTaggingSupport.cpp
@@ -290,8 +290,9 @@ Value *getAndroidSlotPtr(IRBuilder<> &IRB, int Slot) {
Module *M = IRB.GetInsertBlock()->getParent()->getParent();
// Android provides a fixed TLS slot for sanitizers. See TLS_SLOT_SANITIZER
// in Bionic's libc/private/bionic_tls.h.
- Function *ThreadPointerFunc =
- Intrinsic::getOrInsertDeclaration(M, Intrinsic::thread_pointer);
+ Function *ThreadPointerFunc = Intrinsic::getOrInsertDeclaration(
+ M, Intrinsic::thread_pointer,
+ IRB.getPtrTy(M->getDataLayout().getDefaultGlobalsAddressSpace()));
return IRB.CreateConstGEP1_32(IRB.getInt8Ty(),
IRB.CreateCall(ThreadPointerFunc), 8 * Slot);
}
diff --git a/llvm/test/Assembler/autoupgrade-thread-pointer.ll b/llvm/test/Assembler/autoupgrade-thread-pointer.ll
index b1ed15a7e4ef8..178e31f50b1bf 100644
--- a/llvm/test/Assembler/autoupgrade-thread-pointer.ll
+++ b/llvm/test/Assembler/autoupgrade-thread-pointer.ll
@@ -6,14 +6,14 @@ declare ptr @llvm.arm.thread.pointer()
define ptr @test1() {
; CHECK-LABEL: define ptr @test1()
-; CHECK: call ptr @llvm.thread.pointer()
+; CHECK: call ptr @llvm.thread.pointer.p0()
%1 = call ptr @llvm.aarch64.thread.pointer()
ret ptr %1
}
define ptr @test2() {
; CHECK-LABEL: define ptr @test2()
-; CHECK: call ptr @llvm.thread.pointer()
+; CHECK: call ptr @llvm.thread.pointer.p0()
%1 = call ptr @llvm.arm.thread.pointer()
ret ptr %1
}
diff --git a/llvm/test/CodeGen/AArch64/stack-tagging-prologue.ll b/llvm/test/CodeGen/AArch64/stack-tagging-prologue.ll
index 3eed6d45c7710..132caef3763ec 100644
--- a/llvm/test/CodeGen/AArch64/stack-tagging-prologue.ll
+++ b/llvm/test/CodeGen/AArch64/stack-tagging-prologue.ll
@@ -23,7 +23,7 @@ entry:
; INSTR-LABEL: define void @OneVar(
; INSTR: [[BASE:%.*]] = call ptr @llvm.aarch64.irg.sp(i64 0)
-; INSTR: [[TLS:%.*]] = call ptr @llvm.thread.pointer()
+; INSTR: [[TLS:%.*]] = call ptr @llvm.thread.pointer.p0()
; INSTR: [[TLS_SLOT:%.*]] = getelementptr i8, ptr [[TLS]], i32 -24
; INSTR: [[TLS_VALUE:%.*]] = load i64, ptr [[TLS_SLOT]], align 8
; INSTR: [[FP:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
diff --git a/llvm/test/Instrumentation/HWAddressSanitizer/alloca-array.ll b/llvm/test/Instrumentation/HWAddressSanitizer/alloca-array.ll
index 51d34ce5b3882..9064d5ca8df4e 100644
--- a/llvm/test/Instrumentation/HWAddressSanitizer/alloca-array.ll
+++ b/llvm/test/Instrumentation/HWAddressSanitizer/alloca-array.ll
@@ -9,7 +9,7 @@ declare void @use(ptr, ptr)
define void @test_alloca() sanitize_hwaddress {
; CHECK-LABEL: define void @test_alloca
; CHECK-SAME: () #[[ATTR0:[0-9]+]] {
-; CHECK-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer()
+; CHECK-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer.p0()
; CHECK-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48
; CHECK-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 8
; CHECK-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3
diff --git a/llvm/test/Instrumentation/HWAddressSanitizer/alloca-compat.ll b/llvm/test/Instrumentation/HWAddressSanitizer/alloca-compat.ll
index 9e9ed50d35daf..aae2946cbb190 100644
--- a/llvm/test/Instrumentation/HWAddressSanitizer/alloca-compat.ll
+++ b/llvm/test/Instrumentation/HWAddressSanitizer/alloca-compat.ll
@@ -11,7 +11,7 @@ declare void @use32(ptr)
define void @test_alloca() sanitize_hwaddress {
; CHECK-LABEL: define void @test_alloca
; CHECK-SAME: () #[[ATTR0:[0-9]+]] {
-; CHECK-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer()
+; CHECK-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer.p0()
; CHECK-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48
; CHECK-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 8
; CHECK-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3
diff --git a/llvm/test/Instrumentation/HWAddressSanitizer/alloca-with-calls.ll b/llvm/test/Instrumentation/HWAddressSanitizer/alloca-with-calls.ll
index 0ef09321e41ad..9ef624c0b7f75 100644
--- a/llvm/test/Instrumentation/HWAddressSanitizer/alloca-with-calls.ll
+++ b/llvm/test/Instrumentation/HWAddressSanitizer/alloca-with-calls.ll
@@ -12,7 +12,7 @@ define void @test_alloca() sanitize_hwaddress {
; CHECK-LABEL: define void @test_alloca
; CHECK-SAME: () #[[ATTR0:[0-9]+]] {
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[TMP0:%.*]] = call ptr @llvm.thread.pointer()
+; CHECK-NEXT: [[TMP0:%.*]] = call ptr @llvm.thread.pointer.p0()
; CHECK-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 48
; CHECK-NEXT: [[TMP2:%.*]] = load i64, ptr [[TMP1]], align 8
; CHECK-NEXT: [[TMP3:%.*]] = ashr i64 [[TMP2]], 3
diff --git a/llvm/test/Instrumentation/HWAddressSanitizer/exception-lifetime.ll b/llvm/test/Instrumentation/HWAddressSanitizer/exception-lifetime.ll
index 9e9fceb5eb472..50ce490f297bc 100644
--- a/llvm/test/Instrumentation/HWAddressSanitizer/exception-lifetime.ll
+++ b/llvm/test/Instrumentation/HWAddressSanitizer/exception-lifetime.ll
@@ -18,7 +18,7 @@ define void @test() sanitize_hwaddress personality ptr @__gxx_personality_v0 {
; CHECK-LABEL: define void @test
; CHECK-SAME: () #[[ATTR0:[0-9]+]] personality ptr @__gxx_personality_v0 {
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[TMP0:%.*]] = call ptr @llvm.thread.pointer()
+; CHECK-NEXT: [[TMP0:%.*]] = call ptr @llvm.thread.pointer.p0()
; CHECK-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 48
; CHECK-NEXT: [[TMP2:%.*]] = load i64, ptr [[TMP1]], align 8
; CHECK-NEXT: [[TMP3:%.*]] = ashr i64 [[TMP2]], 3
diff --git a/llvm/test/Instrumentation/HWAddressSanitizer/prologue.ll b/llvm/test/Instrumentation/HWAddressSanitizer/prologue.ll
index 1698592bafc62..4e7c021bd7f97 100644
--- a/llvm/test/Instrumentation/HWAddressSanitizer/prologue.ll
+++ b/llvm/test/Instrumentation/HWAddressSanitizer/prologue.ll
@@ -88,7 +88,7 @@ define void @test_alloca() sanitize_hwaddress {
; CHECK-LABEL: define void @test_alloca
; CHECK-SAME: () #[[ATTR0]] {
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[TMP0:%.*]] = call ptr @llvm.thread.pointer()
+; CHECK-NEXT: [[TMP0:%.*]] = call ptr @llvm.thread.pointer.p0()
; CHECK-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 48
; CHECK-NEXT: [[TMP2:%.*]] = load i64, ptr [[TMP1]], align 8
; CHECK-NEXT: [[TMP3:%.*]] = ashr i64 [[TMP2]], 3
@@ -134,7 +134,7 @@ define void @test_alloca() sanitize_hwaddress {
; NOIFUNC-TLS-HISTORY-LABEL: define void @test_alloca
; NOIFUNC-TLS-HISTORY-SAME: () #[[ATTR0]] {
; NOIFUNC-TLS-HISTORY-NEXT: entry:
-; NOIFUNC-TLS-HISTORY-NEXT: [[TMP0:%.*]] = call ptr @llvm.thread.pointer()
+; NOIFUNC-TLS-HISTORY-NEXT: [[TMP0:%.*]] = call ptr @llvm.thread.pointer.p0()
; NOIFUNC-TLS-HISTORY-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 48
; NOIFUNC-TLS-HISTORY-NEXT: [[TMP2:%.*]] = load i64, ptr [[TMP1]], align 8
; NOIFUNC-TLS-HISTORY-NEXT: [[TMP3:%.*]] = ashr i64 [[TMP2]], 3
diff --git a/llvm/test/Instrumentation/HWAddressSanitizer/use-after-scope-setjmp.ll b/llvm/test/Instrumentation/HWAddressSanitizer/use-after-scope-setjmp.ll
index 62fd7a1671569..57d37ca1ef95a 100644
--- a/llvm/test/Instrumentation/HWAddressSanitizer/use-after-scope-setjmp.ll
+++ b/llvm/test/Instrumentation/HWAddressSanitizer/use-after-scope-setjmp.ll
@@ -12,7 +12,7 @@ define dso_local noundef i1 @_Z6targetv() sanitize_hwaddress {
; CHECK-LABEL: define dso_local noundef i1 @_Z6targetv
; CHECK-SAME: () #[[ATTR0:[0-9]+]] {
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[TMP0:%.*]] = call ptr @llvm.thread.pointer()
+; CHECK-NEXT: [[TMP0:%.*]] = call ptr @llvm.thread.pointer.p0()
; CHECK-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 48
; CHECK-NEXT: [[TMP2:%.*]] = load i64, ptr [[TMP1]], align 8
; CHECK-NEXT: [[TMP3:%.*]] = ashr i64 [[TMP2]], 3
diff --git a/llvm/test/Instrumentation/HWAddressSanitizer/use-after-scope.ll b/llvm/test/Instrumentation/HWAddressSanitizer/use-after-scope.ll
index 16e6cda59a616..e30b51890e172 100644
--- a/llvm/test/Instrumentation/HWAddressSanitizer/use-after-scope.ll
+++ b/llvm/test/Instrumentation/HWAddressSanitizer/use-after-scope.ll
@@ -65,7 +65,7 @@ define dso_local i32 @standard_lifetime() local_unnamed_addr sanitize_hwaddress
; X86-NOSCOPE-NEXT: ret i32 0
;
; AARCH64-SCOPE-LABEL: @standard_lifetime(
-; AARCH64-SCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer()
+; AARCH64-SCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer.p0()
; AARCH64-SCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48
; AARCH64-SCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 8
; AARCH64-SCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3
@@ -117,7 +117,7 @@ define dso_local i32 @standard_lifetime() local_unnamed_addr sanitize_hwaddress
; AARCH64-SCOPE-NEXT: ret i32 0
;
; AARCH64-NOSCOPE-LABEL: @standard_lifetime(
-; AARCH64-NOSCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer()
+; AARCH64-NOSCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer.p0()
; AARCH64-NOSCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48
; AARCH64-NOSCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 8
; AARCH64-NOSCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3
@@ -167,7 +167,7 @@ define dso_local i32 @standard_lifetime() local_unnamed_addr sanitize_hwaddress
; AARCH64-NOSCOPE-NEXT: ret i32 0
;
; AARCH64-SHORT-SCOPE-LABEL: @standard_lifetime(
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer()
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer.p0()
; AARCH64-SHORT-SCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48
; AARCH64-SHORT-SCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 8
; AARCH64-SHORT-SCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3
@@ -222,7 +222,7 @@ define dso_local i32 @standard_lifetime() local_unnamed_addr sanitize_hwaddress
; AARCH64-SHORT-SCOPE-NEXT: ret i32 0
;
; AARCH64-SHORT-NOSCOPE-LABEL: @standard_lifetime(
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer()
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer.p0()
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 8
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3
@@ -346,7 +346,7 @@ define dso_local i32 @standard_lifetime_optnone() local_unnamed_addr optnone noi
; X86-NOSCOPE-NEXT: ret i32 0
;
; AARCH64-SCOPE-LABEL: @standard_lifetime_optnone(
-; AARCH64-SCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer()
+; AARCH64-SCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer.p0()
; AARCH64-SCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48
; AARCH64-SCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 8
; AARCH64-SCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3
@@ -398,7 +398,7 @@ define dso_local i32 @standard_lifetime_optnone() local_unnamed_addr optnone noi
; AARCH64-SCOPE-NEXT: ret i32 0
;
; AARCH64-NOSCOPE-LABEL: @standard_lifetime_optnone(
-; AARCH64-NOSCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer()
+; AARCH64-NOSCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer.p0()
; AARCH64-NOSCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48
; AARCH64-NOSCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 8
; AARCH64-NOSCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3
@@ -448,7 +448,7 @@ define dso_local i32 @standard_lifetime_optnone() local_unnamed_addr optnone noi
; AARCH64-NOSCOPE-NEXT: ret i32 0
;
; AARCH64-SHORT-SCOPE-LABEL: @standard_lifetime_optnone(
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer()
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer.p0()
; AARCH64-SHORT-SCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48
; AARCH64-SHORT-SCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 8
; AARCH64-SHORT-SCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3
@@ -503,7 +503,7 @@ define dso_local i32 @standard_lifetime_optnone() local_unnamed_addr optnone noi
; AARCH64-SHORT-SCOPE-NEXT: ret i32 0
;
; AARCH64-SHORT-NOSCOPE-LABEL: @standard_lifetime_optnone(
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer()
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer.p0()
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 8
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3
@@ -617,7 +617,7 @@ define dso_local i32 @multiple_lifetimes() local_unnamed_addr sanitize_hwaddress
; X86-NOSCOPE-NEXT: ret i32 0
;
; AARCH64-SCOPE-LABEL: @multiple_lifetimes(
-; AARCH64-SCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer()
+; AARCH64-SCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer.p0()
; AARCH64-SCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48
; AARCH64-SCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 8
; AARCH64-SCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3
@@ -663,7 +663,7 @@ define dso_local i32 @multiple_lifetimes() local_unnamed_addr sanitize_hwaddress
; AARCH64-SCOPE-NEXT: ret i32 0
;
; AARCH64-NOSCOPE-LABEL: @multiple_lifetimes(
-; AARCH64-NOSCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer()
+; AARCH64-NOSCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer.p0()
; AARCH64-NOSCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48
; AARCH64-NOSCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 8
; AARCH64-NOSCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3
@@ -709,7 +709,7 @@ define dso_local i32 @multiple_lifetimes() local_unnamed_addr sanitize_hwaddress
; AARCH64-NOSCOPE-NEXT: ret i32 0
;
; AARCH64-SHORT-SCOPE-LABEL: @multiple_lifetimes(
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer()
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer.p0()
; AARCH64-SHORT-SCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48
; AARCH64-SHORT-SCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 8
; AARCH64-SHORT-SCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3
@@ -758,7 +758,7 @@ define dso_local i32 @multiple_lifetimes() local_unnamed_addr sanitize_hwaddress
; AARCH64-SHORT-SCOPE-NEXT: ret i32 0
;
; AARCH64-SHORT-NOSCOPE-LABEL: @multiple_lifetimes(
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer()
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer.p0()
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 8
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3
@@ -877,7 +877,7 @@ define dso_local i32 @unreachable_exit() local_unnamed_addr sanitize_h...
[truncated]
``````````
</details>
https://github.com/llvm/llvm-project/pull/132489
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