[llvm] [MCA] Extend -instruction-tables option with verbosity levels (PR #130574)

[Julien Villette via llvm-commits]

================
@@ -141,6 +241,33 @@ void InstructionInfoView::collectData(
     IIVDEntry.mayLoad = MCDesc.mayLoad();
     IIVDEntry.mayStore = MCDesc.mayStore();
     IIVDEntry.hasUnmodeledSideEffects = MCDesc.hasUnmodeledSideEffects();
+
+    if (PrintFullInfo) {
+      // Get latency with bypass
+      IIVDEntry.Bypass =
+          IIVDEntry.Latency - MCSchedModel::getBypassDelayCycles(STI, SCDesc);
+      IIVDEntry.OpcodeName = MCII.getName(Inst.getOpcode());
+      raw_string_ostream TempStream(IIVDEntry.Resources);
+      const MCWriteProcResEntry *Index = STI.getWriteProcResBegin(&SCDesc);
+      const MCWriteProcResEntry *Last = STI.getWriteProcResEnd(&SCDesc);
+      auto Sep = "";
+      for (; Index != Last; ++Index) {
+        if (!Index->ReleaseAtCycle)
+          continue;
+        const MCProcResourceDesc *MCProc =
+            SM.getProcResource(Index->ProcResourceIdx);
+        if (Index->ReleaseAtCycle > 1) {
----------------
jvillette38 wrote:

We should modify `MCSchedModel::getReciprocalThroughput(const MCSubtargetInfo`:
- Version that returns RThroughput for big number of identical instructions:
```CPP
double
MCSchedModel::getReciprocalThroughput(const MCSubtargetInfo &STI,
                                      const MCSchedClassDesc &SCDesc) {
  std::optional<double> Throughput;
  const MCSchedModel &SM = STI.getSchedModel();
  const MCWriteProcResEntry *I = STI.getWriteProcResBegin(&SCDesc);
  const MCWriteProcResEntry *E = STI.getWriteProcResEnd(&SCDesc);
  for (; I != E; ++I) {
    if (!I->ReleaseAtCycle)
      continue;
    unsigned NumUnits = SM.getProcResource(I->ProcResourceIdx)->NumUnits;
    unsigned Range =  I->ReleaseAtCycle;
    if (I->AcquireAtCycle)
      Range = Range - AcquireAtCycle;
    double Temp = NumUnits * 1.0 / Range;
    Throughput = Throughput ? std::min(*Throughput, Temp) : Temp;
  }
  if (Throughput)
    return 1.0 / *Throughput;

  // If no throughput value was calculated, assume that we can execute at the
  // maximum issue width scaled by number of micro-ops for the schedule class.
  return ((double)SCDesc.NumMicroOps) / SM.IssueWidth;
}
```
- Version that returns RThroughput for one instruction but considering max range [AcquireAtCycle,ReleaseAtCycle]:
```CPP
double
MCSchedModel::getReciprocalThroughput(const MCSubtargetInfo &STI,
                                      const MCSchedClassDesc &SCDesc) {
  std::optional<double> Throughput;
  const MCSchedModel &SM = STI.getSchedModel();
  const MCWriteProcResEntry *I = STI.getWriteProcResBegin(&SCDesc);
  const MCWriteProcResEntry *E = STI.getWriteProcResEnd(&SCDesc);
  unsigned MaxRange = 0;
  for (; I != E; ++I) {
    if (!I->ReleaseAtCycle)
      continue;
    unsigned NumUnits = SM.getProcResource(I->ProcResourceIdx)->NumUnits;
    unsigned Range =  I->ReleaseAtCycle;
    if (I->AcquireAtCycle)
      Range = Range - AcquireAtCycle;
    if (Range > MaxRange) {
      MaxRange = Range;
      double Temp = NumUnits * 1.0 / I->ReleaseAtCycle;
      Throughput = Throughput ? std::min(*Throughput, Temp) : Temp;
    }
  }
  if (Throughput)
    return 1.0 / *Throughput;

  // If no throughput value was calculated, assume that we can execute at the
  // maximum issue width scaled by number of micro-ops for the schedule class.
  return ((double)SCDesc.NumMicroOps) / SM.IssueWidth;
}
```

https://github.com/llvm/llvm-project/pull/130574