[llvm] [AArch64] Don't try to vectorize fixed point to fp narrowing conversion (PR #130665)

[Pranav Kant via llvm-commits]

================
@@ -23,26 +23,54 @@ define <16 x half> @sitofp_i32(<16 x i32> %a) #0 {
 define <16 x half> @sitofp_i64(<16 x i64> %a) #0 {
 ; CHECK-LABEL: sitofp_i64:
 ; CHECK:       // %bb.0:
-; CHECK-NEXT:    scvtf v0.2d, v0.2d
-; CHECK-NEXT:    scvtf v4.2d, v4.2d
-; CHECK-NEXT:    scvtf v2.2d, v2.2d
-; CHECK-NEXT:    scvtf v1.2d, v1.2d
-; CHECK-NEXT:    scvtf v6.2d, v6.2d
-; CHECK-NEXT:    scvtf v5.2d, v5.2d
-; CHECK-NEXT:    scvtf v3.2d, v3.2d
-; CHECK-NEXT:    fcvtn v0.2s, v0.2d
-; CHECK-NEXT:    fcvtn v4.2s, v4.2d
-; CHECK-NEXT:    fcvtn v2.2s, v2.2d
-; CHECK-NEXT:    fcvtn v6.2s, v6.2d
-; CHECK-NEXT:    fcvtn2 v0.4s, v1.2d
-; CHECK-NEXT:    scvtf v1.2d, v7.2d
-; CHECK-NEXT:    fcvtn2 v4.4s, v5.2d
-; CHECK-NEXT:    fcvtn2 v2.4s, v3.2d
+; CHECK-NEXT:    fmov x12, d0
----------------
pranavk wrote:

Okay, I pattern-matched that and was able to exclude all such tests that eventually end up rounding to f16 as that doesn't exhibit rounding errors we are worried about. That did get rid of ~5 tests that remain unchanged with this PR now.

https://github.com/llvm/llvm-project/pull/130665