[llvm] [AMDGPU][MC] Allow 128-bit rsrc register in MIMG instructions (PR #132264)

[Jun Wang via llvm-commits]

jwanggit86 wrote:

Please note that coding is not complete (e.g., gfx10-12 not handled yet). I would like to get some feedback on the approach before going further.

https://github.com/llvm/llvm-project/pull/132264