[llvm] [AMDGPU] Try to reuse in v_cndmask register with constant from compare. (PR #131146)

[Daniil Fukalov via llvm-commits]

dfukalov wrote:

> This pass should handle all MIR correctly, not just the MIR that we currently see as a result of how InstCombine behaves today.

Actually the pass doesn't wait a result of InstCombine only, but checks the pattern for a `v_cndmask` instruction like:
```
%10:sgpr_32 = S_MOV_B32 1048240456
%11:sreg_64_xexec = nofpexcept V_CMP_NEQ_F32_e64 0, %8:vgpr_32, 0, %10:sgpr_32, 0, implicit $mode, implicit $exec
%13:vgpr_32 = V_MOV_B32_e32 1048240456, implicit $exec
%12:vgpr_32 = V_CNDMASK_B32_e64 0, %13:vgpr_32, 0, %9:vgpr_32, killed %11:sreg_64_xexec, implicit $exec
```

For both non-mask parameters of the instruction it:
1. checks if the paramer is actually a reg that contains imm
2. gets def of the mask parameter
3. if it is one of supported compare operations, checks, that it is actually comparison with the same imm allocated in a register
4. regarding EQ or NEQ compare **re**uses this register in cndmask ubstruction, so in the previous pattern %8 is used instead of %13:
```
%10:sgpr_32 = S_MOV_B32 1048240456
%11:sreg_64_xexec = nofpexcept V_CMP_NEQ_F32_e64 0, %8:vgpr_32, 0, %10:sgpr_32, 0, implicit $mode, implicit $exec
%13:vgpr_32 = V_MOV_B32_e32 1048240456, implicit $exec
%12:vgpr_32 = V_CNDMASK_B32_e64 0, %8:vgpr_32, 0, %9:vgpr_32, killed %11:sreg_64_xexec, implicit $exec
```

Or, did you mean the test should be reworked to MIR tests?

https://github.com/llvm/llvm-project/pull/131146