[llvm] [X86][NFC] Added/Updated SQRT function testcases (PR #132205)

[via llvm-commits]

https://github.com/JaydeepChauhan14 created https://github.com/llvm/llvm-project/pull/132205

None

>From efaa8f7ea50576f4d079f8e441046657811528d6 Mon Sep 17 00:00:00 2001
From: Chauhan Jaydeep Ashwinbhai <chauhan.jaydeep.ashwinbhai at intel.com>
Date: Thu, 20 Mar 2025 06:13:03 -0700
Subject: [PATCH] [X86][NFC] Added/Updated SQRT function testcases

---
 llvm/test/CodeGen/X86/sqrt.ll | 43 +++++++++++++++++++++++++++++++++++
 1 file changed, 43 insertions(+)

diff --git a/llvm/test/CodeGen/X86/sqrt.ll b/llvm/test/CodeGen/X86/sqrt.ll
index becdbb18f42b0..c019261bc7368 100644
--- a/llvm/test/CodeGen/X86/sqrt.ll
+++ b/llvm/test/CodeGen/X86/sqrt.ll
@@ -1,8 +1,13 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=-avx,+sse2                             | FileCheck %s --check-prefix=SSE2
 ; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=-avx,+sse2 -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefix=SSE2
+; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=-avx,+sse2 -global-isel -global-isel-abort=2 | FileCheck %s --check-prefix=SSE2
 ; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=-avx2,+avx                             | FileCheck %s --check-prefix=AVX
 ; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=-avx2,+avx -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefix=AVX
+; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=-avx2,+avx -global-isel -global-isel-abort=2 | FileCheck %s --check-prefix=AVX
+; RUN: llc < %s -mtriple=i686-linux-gnu -fast-isel=1 | FileCheck %s --check-prefixes=X86,FASTISEL-X86
+; RUN: llc < %s -mtriple=i686-linux-gnu -global-isel=0 -fast-isel=0 | FileCheck %s --check-prefixes=X86,SDAG-X86
+; RUN: llc < %s -mtriple=i686-linux-gnu -global-isel -global-isel-abort=2 | FileCheck %s --check-prefixes=X86,GISEL-X86
 
 define float @test_sqrt_f32(float %a) {
 ; SSE2-LABEL: test_sqrt_f32:
@@ -14,6 +19,12 @@ define float @test_sqrt_f32(float %a) {
 ; AVX:       ## %bb.0:
 ; AVX-NEXT:    vsqrtss %xmm0, %xmm0, %xmm0
 ; AVX-NEXT:    retq
+;
+; X86-LABEL: test_sqrt_f32:
+; X86:       # %bb.0:
+; X86-NEXT:    flds {{[0-9]+}}(%esp)
+; X86-NEXT:    fsqrt
+; X86-NEXT:    retl
   %res = call float @llvm.sqrt.f32(float %a)
   ret float %res
 }
@@ -29,9 +40,41 @@ define double @test_sqrt_f64(double %a) {
 ; AVX:       ## %bb.0:
 ; AVX-NEXT:    vsqrtsd %xmm0, %xmm0, %xmm0
 ; AVX-NEXT:    retq
+;
+; X86-LABEL: test_sqrt_f64:
+; X86:       # %bb.0:
+; X86-NEXT:    fldl {{[0-9]+}}(%esp)
+; X86-NEXT:    fsqrt
+; X86-NEXT:    retl
   %res = call double @llvm.sqrt.f64(double %a)
   ret double %res
 }
 declare double @llvm.sqrt.f64(double) nounwind readnone
 
+define x86_fp80 @test_sqrt_f80(x86_fp80 %a) {
+; SSE2-LABEL: test_sqrt_f80:
+; SSE2:       ## %bb.0:
+; SSE2-NEXT:    fldt {{[0-9]+}}(%rsp)
+; SSE2-NEXT:    fsqrt
+; SSE2-NEXT:    retq
+;
+; AVX-LABEL: test_sqrt_f80:
+; AVX:       ## %bb.0:
+; AVX-NEXT:    fldt {{[0-9]+}}(%rsp)
+; AVX-NEXT:    fsqrt
+; AVX-NEXT:    retq
+;
+; X86-LABEL: test_sqrt_f80:
+; X86:       # %bb.0:
+; X86-NEXT:    fldt {{[0-9]+}}(%esp)
+; X86-NEXT:    fsqrt
+; X86-NEXT:    retl
+  %res = call x86_fp80 @llvm.sqrt.f80(x86_fp80 %a)
+  ret x86_fp80 %res
+}
+declare x86_fp80 @llvm.sqrt.f80(x86_fp80) nounwind readnone
 
+;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
+; FASTISEL-X86: {{.*}}
+; GISEL-X86: {{.*}}
+; SDAG-X86: {{.*}}