[llvm] [RISCV] Add Qualcomn uC Xqcisync Synchronization And Delay Extension (PR #132200)
via llvm-commits
llvm-commits at lists.llvm.org
Thu Mar 20 05:36:49 PDT 2025
github-actions[bot] wrote:
<!--LLVM CODE FORMAT COMMENT: {clang-format}-->
:warning: C/C++ code formatter, clang-format found issues in your code. :warning:
<details>
<summary>
You can test this locally with the following command:
</summary>
``````````bash
git-clang-format --diff 0744d4926a0c567b0f10d19f0478b7a4bf960a19 87c2a2dbc308274c2b0bdfbfbde6f32fc4dd249c --extensions cpp -- llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp llvm/lib/TargetParser/RISCVISAInfo.cpp
``````````
</details>
<details>
<summary>
View the diff from clang-format here.
</summary>
``````````diff
diff --git a/llvm/lib/TargetParser/RISCVISAInfo.cpp b/llvm/lib/TargetParser/RISCVISAInfo.cpp
index ed24a4ff1d..cb161b0bfa 100644
--- a/llvm/lib/TargetParser/RISCVISAInfo.cpp
+++ b/llvm/lib/TargetParser/RISCVISAInfo.cpp
@@ -744,10 +744,10 @@ Error RISCVISAInfo::checkDependency() {
bool HasXqccmp = Exts.count("xqccmp") != 0;
static constexpr StringLiteral XqciExts[] = {
- {"xqcia"}, {"xqciac"}, {"xqcibi"}, {"xqcibm"},
- {"xqcicli"}, {"xqcicm"}, {"xqcics"}, {"xqcicsr"},
- {"xqciint"}, {"xqcilb"}, {"xqcili"}, {"xqcilia"},
- {"xqcilo"}, {"xqcilsm"}, {"xqcisim"}, {"xqcisls"},{"xqcisync"}};
+ {"xqcia"}, {"xqciac"}, {"xqcibi"}, {"xqcibm"}, {"xqcicli"},
+ {"xqcicm"}, {"xqcics"}, {"xqcicsr"}, {"xqciint"}, {"xqcilb"},
+ {"xqcili"}, {"xqcilia"}, {"xqcilo"}, {"xqcilsm"}, {"xqcisim"},
+ {"xqcisls"}, {"xqcisync"}};
static constexpr StringLiteral ZcdOverlaps[] = {
{"zcmt"}, {"zcmp"}, {"xqccmp"}, {"xqciac"}, {"xqcicm"}};
``````````
</details>
https://github.com/llvm/llvm-project/pull/132200
More information about the llvm-commits
mailing list