[llvm] 2a53358 - [RISCV] Add a comment to clarify purpose of a test from 93b8ef

[Philip Reames via llvm-commits]

Author: Philip Reames
Date: 2025-03-19T13:36:25-07:00
New Revision: 2a53358eea7f8da9ffb92d375976b3f78ce5f212

URL: https://github.com/llvm/llvm-project/commit/2a53358eea7f8da9ffb92d375976b3f78ce5f212
DIFF: https://github.com/llvm/llvm-project/commit/2a53358eea7f8da9ffb92d375976b3f78ce5f212.diff

LOG: [RISCV] Add a comment to clarify purpose of a test from 93b8ef

Added: 
    

Modified: 
    llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-zipeven-zipodd.ll

Removed: 
    


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diff  --git a/llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-zipeven-zipodd.ll b/llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-zipeven-zipodd.ll
index 75eb75fbd65b1..4dde731249bd6 100644
--- a/llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-zipeven-zipodd.ll
+++ b/llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-zipeven-zipodd.ll
@@ -120,6 +120,9 @@ entry:
   ret <4 x i32> %c
 }
 
+; This is the zipeven pattern with a poison second operand.  That happens
+; to also be described as an identity shuffle, so this is testing that we
+; don't emit the zipeven instruction.
 define <4 x i32> @zipeven_v4i32_single(<4 x i32> %a) {
 ; CHECK-LABEL: zipeven_v4i32_single:
 ; CHECK:       # %bb.0: # %entry
@@ -129,6 +132,9 @@ entry:
   ret <4 x i32> %c
 }
 
+; This is the zipodd pattern with a poison second operand.  That happens
+; to also be described as a single slide, so this is testing that we
+; don't emit the zipodd instruction.
 define <4 x i32> @zipodd_v4i32_single(<4 x i32> %a) {
 ; CHECK-LABEL: zipodd_v4i32_single:
 ; CHECK:       # %bb.0: # %entry