[llvm] 15c96d6 - [RISCV] Update unrelated bad code from test case

[Michael Maitland via llvm-commits]

Author: Michael Maitland
Date: 2025-03-19T11:09:49-07:00
New Revision: 15c96d6874e8e37e583cf2994b290b9a6869cd30

URL: https://github.com/llvm/llvm-project/commit/15c96d6874e8e37e583cf2994b290b9a6869cd30
DIFF: https://github.com/llvm/llvm-project/commit/15c96d6874e8e37e583cf2994b290b9a6869cd30.diff

LOG: [RISCV] Update unrelated bad code from test case

In #131684, we found that the code generated a bnez zero, which is always
false. Since this is unrelated to the regression the test case was added for,
we change the IR here to avoid this test case from having this silly branching
pattern. This will help this test case avoid any changes as we do work to
optimize branches in the RISC-V backend.

Added: 
    

Modified: 
    llvm/test/CodeGen/RISCV/push-pop-opt-crash.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/CodeGen/RISCV/push-pop-opt-crash.ll b/llvm/test/CodeGen/RISCV/push-pop-opt-crash.ll
index 1e72529b17f59..00689c3136517 100644
--- a/llvm/test/CodeGen/RISCV/push-pop-opt-crash.ll
+++ b/llvm/test/CodeGen/RISCV/push-pop-opt-crash.ll
@@ -1,3 +1,4 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
 ; RUN: llc -mattr=+zcmp -verify-machineinstrs  \
 ; RUN: -mtriple=riscv32 -target-abi=ilp32 < %s \
 ; RUN: | FileCheck %s -check-prefixes=RV32IZCMP
@@ -11,40 +12,39 @@
 
 declare dso_local void @f1() local_unnamed_addr
 declare dso_local void @f2() local_unnamed_addr
-define  dso_local void @f0() local_unnamed_addr {
+define  dso_local void @f0(i1 %c) local_unnamed_addr {
 ; RV32IZCMP-LABEL: f0:
-; RV32IZCMP: 	.cfi_startproc
-; RV32IZCMP-NEXT: # %bb.0:                                # %entry
-; RV32IZCMP-NEXT: 	bnez	zero, .LBB0_2
-; RV32IZCMP-NEXT: # %bb.1:                                # %if.T
-; RV32IZCMP-NEXT: 	cm.push	{ra}, -16
-; RV32IZCMP-NEXT: 	.cfi_def_cfa_offset 16
-; RV32IZCMP-NEXT: 	.cfi_offset ra, -4
-; RV32IZCMP-NEXT: 	call	f1
-; RV32IZCMP-NEXT: 	cm.pop	{ra}, 16
-; RV32IZCMP-NEXT:     .cfi_restore ra
-; RV32IZCMP-NEXT:     .cfi_def_cfa_offset 0
-; RV32IZCMP-NEXT: .LBB0_2:                                # %if.F
-; RV32IZCMP-NEXT: 	tail	f2
-; RV32IZCMP-NEXT: .Lfunc_end0:
-
+; RV32IZCMP:       # %bb.0: # %entry
+; RV32IZCMP-NEXT:    andi a0, a0, 1
+; RV32IZCMP-NEXT:    beqz a0, .LBB0_2
+; RV32IZCMP-NEXT:  # %bb.1: # %if.T
+; RV32IZCMP-NEXT:    cm.push {ra}, -16
+; RV32IZCMP-NEXT:    .cfi_def_cfa_offset 16
+; RV32IZCMP-NEXT:    .cfi_offset ra, -4
+; RV32IZCMP-NEXT:    call f1
+; RV32IZCMP-NEXT:    cm.pop {ra}, 16
+; RV32IZCMP-NEXT:    .cfi_restore ra
+; RV32IZCMP-NEXT:    .cfi_def_cfa_offset 0
+; RV32IZCMP-NEXT:  .LBB0_2: # %if.F
+; RV32IZCMP-NEXT:    tail f2
+;
 ; RV64IZCMP-LABEL: f0:
-; RV64IZCMP: 	.cfi_startproc
-; RV64IZCMP-NEXT: # %bb.0:                                # %entry
-; RV64IZCMP-NEXT: 	bnez	zero, .LBB0_2
-; RV64IZCMP-NEXT: # %bb.1:                                # %if.T
-; RV64IZCMP-NEXT: 	cm.push	{ra}, -16
-; RV64IZCMP-NEXT: 	.cfi_def_cfa_offset 16
-; RV64IZCMP-NEXT: 	.cfi_offset ra, -8
-; RV64IZCMP-NEXT: 	call	f1
-; RV64IZCMP-NEXT: 	cm.pop	{ra}, 16
-; RV64IZCMP-NEXT:     .cfi_restore ra
-; RV64IZCMP-NEXT:     .cfi_def_cfa_offset 0
-; RV64IZCMP-NEXT: .LBB0_2:                                # %if.F
-; RV64IZCMP-NEXT: 	tail	f2
-; RV64IZCMP-NEXT: .Lfunc_end0:
+; RV64IZCMP:       # %bb.0: # %entry
+; RV64IZCMP-NEXT:    andi a0, a0, 1
+; RV64IZCMP-NEXT:    beqz a0, .LBB0_2
+; RV64IZCMP-NEXT:  # %bb.1: # %if.T
+; RV64IZCMP-NEXT:    cm.push {ra}, -16
+; RV64IZCMP-NEXT:    .cfi_def_cfa_offset 16
+; RV64IZCMP-NEXT:    .cfi_offset ra, -8
+; RV64IZCMP-NEXT:    call f1
+; RV64IZCMP-NEXT:    cm.pop {ra}, 16
+; RV64IZCMP-NEXT:    .cfi_restore ra
+; RV64IZCMP-NEXT:    .cfi_def_cfa_offset 0
+; RV64IZCMP-NEXT:  .LBB0_2: # %if.F
+; RV64IZCMP-NEXT:    tail f2
+
 entry:
-  br i1 poison, label %if.T, label %if.F
+  br i1 %c, label %if.T, label %if.F
 
 if.T:
   tail call void @f1()