[llvm] [Intrinsics] Add Intrinsic::getFnAttributes() (NFC) (PR #132029)
Nikita Popov via llvm-commits
llvm-commits at lists.llvm.org
Wed Mar 19 06:48:46 PDT 2025
https://github.com/nikic created https://github.com/llvm/llvm-project/pull/132029
Most places that call Intrinsic::getAttributes() are only interested in the function attributes, so add a separate function for that.
The motivation for this is that I'd like to add the ability to specify range attributes on intrinsics, which requires knowing the function type. This avoids needing to know the type for most attribute queries.
>From 28e309d6c348ae233968e82ee633fcc0d1a51516 Mon Sep 17 00:00:00 2001
From: Nikita Popov <npopov at redhat.com>
Date: Wed, 19 Mar 2025 14:28:28 +0100
Subject: [PATCH] [Intrinsics] Add Intrinsic::getFnAttributes() (NFC)
Most places that call Intrinsic::getAttributes() are only interested
in the function attributes, so add a separate function for that.
The motivation for this is that I'd like to add the ability to
specify range attributes on intrinsics, which requires knowing
the function type. This avoids needing to know the type for most
attribute queries.
---
llvm/include/llvm/IR/Intrinsics.h | 4 +++
llvm/lib/CodeGen/ExpandVectorPredication.cpp | 4 +--
.../CodeGen/GlobalISel/MachineIRBuilder.cpp | 8 +++---
llvm/lib/CodeGen/MachineVerifier.cpp | 6 ++---
llvm/lib/IR/Intrinsics.cpp | 8 ++++++
llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 4 +--
llvm/lib/Transforms/Vectorize/VPlan.h | 6 ++---
.../Transforms/Vectorize/VectorCombine.cpp | 4 +--
llvm/test/TableGen/intrinsic-attrs.td | 4 +--
.../utils/TableGen/Basic/IntrinsicEmitter.cpp | 26 +++++++++----------
10 files changed, 43 insertions(+), 31 deletions(-)
diff --git a/llvm/include/llvm/IR/Intrinsics.h b/llvm/include/llvm/IR/Intrinsics.h
index 65a7fc0ce2c1c..ccca7a06f43aa 100644
--- a/llvm/include/llvm/IR/Intrinsics.h
+++ b/llvm/include/llvm/IR/Intrinsics.h
@@ -28,6 +28,7 @@ class Function;
class LLVMContext;
class Module;
class AttributeList;
+class AttributeSet;
/// This namespace contains an enum with a value for every intrinsic/builtin
/// function known by LLVM. The enum values are returned by
@@ -87,6 +88,9 @@ namespace Intrinsic {
/// Return the attributes for an intrinsic.
AttributeList getAttributes(LLVMContext &C, ID id);
+ /// Return the function attributes for an intrinsic.
+ AttributeSet getFnAttributes(LLVMContext &C, ID id);
+
/// Look up the Function declaration of the intrinsic \p id in the Module
/// \p M. If it does not exist, add a declaration and return it. Otherwise,
/// return the existing declaration.
diff --git a/llvm/lib/CodeGen/ExpandVectorPredication.cpp b/llvm/lib/CodeGen/ExpandVectorPredication.cpp
index 67df1cd5246ef..1bb0763fcf57b 100644
--- a/llvm/lib/CodeGen/ExpandVectorPredication.cpp
+++ b/llvm/lib/CodeGen/ExpandVectorPredication.cpp
@@ -121,8 +121,8 @@ static bool maySpeculateLanes(VPIntrinsic &VPI) {
return false;
// Fallback to whether the intrinsic is speculatable.
if (auto IntrID = VPI.getFunctionalIntrinsicID())
- return Intrinsic::getAttributes(VPI.getContext(), *IntrID)
- .hasFnAttr(Attribute::AttrKind::Speculatable);
+ return Intrinsic::getFnAttributes(VPI.getContext(), *IntrID)
+ .hasAttribute(Attribute::AttrKind::Speculatable);
if (auto Opc = VPI.getFunctionalOpcode())
return isSafeToSpeculativelyExecuteWithOpcode(*Opc, &VPI);
return false;
diff --git a/llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp b/llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp
index 77a1a70d976d6..359677027f52f 100644
--- a/llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp
@@ -880,9 +880,9 @@ MachineIRBuilder::buildIntrinsic(Intrinsic::ID ID,
MachineInstrBuilder
MachineIRBuilder::buildIntrinsic(Intrinsic::ID ID,
ArrayRef<Register> ResultRegs) {
- auto Attrs = Intrinsic::getAttributes(getContext(), ID);
+ AttributeSet Attrs = Intrinsic::getFnAttributes(getContext(), ID);
bool HasSideEffects = !Attrs.getMemoryEffects().doesNotAccessMemory();
- bool isConvergent = Attrs.hasFnAttr(Attribute::Convergent);
+ bool isConvergent = Attrs.hasAttribute(Attribute::Convergent);
return buildIntrinsic(ID, ResultRegs, HasSideEffects, isConvergent);
}
@@ -899,9 +899,9 @@ MachineInstrBuilder MachineIRBuilder::buildIntrinsic(Intrinsic::ID ID,
MachineInstrBuilder MachineIRBuilder::buildIntrinsic(Intrinsic::ID ID,
ArrayRef<DstOp> Results) {
- auto Attrs = Intrinsic::getAttributes(getContext(), ID);
+ AttributeSet Attrs = Intrinsic::getFnAttributes(getContext(), ID);
bool HasSideEffects = !Attrs.getMemoryEffects().doesNotAccessMemory();
- bool isConvergent = Attrs.hasFnAttr(Attribute::Convergent);
+ bool isConvergent = Attrs.hasAttribute(Attribute::Convergent);
return buildIntrinsic(ID, Results, HasSideEffects, isConvergent);
}
diff --git a/llvm/lib/CodeGen/MachineVerifier.cpp b/llvm/lib/CodeGen/MachineVerifier.cpp
index b8067906b5d73..735e1f50b0d24 100644
--- a/llvm/lib/CodeGen/MachineVerifier.cpp
+++ b/llvm/lib/CodeGen/MachineVerifier.cpp
@@ -1070,7 +1070,7 @@ bool MachineVerifier::verifyGIntrinsicSideEffects(const MachineInstr *MI) {
Opcode == TargetOpcode::G_INTRINSIC_CONVERGENT;
unsigned IntrID = cast<GIntrinsic>(MI)->getIntrinsicID();
if (IntrID != 0 && IntrID < Intrinsic::num_intrinsics) {
- AttributeList Attrs = Intrinsic::getAttributes(
+ AttributeSet Attrs = Intrinsic::getFnAttributes(
MF->getFunction().getContext(), static_cast<Intrinsic::ID>(IntrID));
bool DeclHasSideEffects = !Attrs.getMemoryEffects().doesNotAccessMemory();
if (NoSideEffects && DeclHasSideEffects) {
@@ -1094,9 +1094,9 @@ bool MachineVerifier::verifyGIntrinsicConvergence(const MachineInstr *MI) {
Opcode == TargetOpcode::G_INTRINSIC_W_SIDE_EFFECTS;
unsigned IntrID = cast<GIntrinsic>(MI)->getIntrinsicID();
if (IntrID != 0 && IntrID < Intrinsic::num_intrinsics) {
- AttributeList Attrs = Intrinsic::getAttributes(
+ AttributeSet Attrs = Intrinsic::getFnAttributes(
MF->getFunction().getContext(), static_cast<Intrinsic::ID>(IntrID));
- bool DeclIsConvergent = Attrs.hasFnAttr(Attribute::Convergent);
+ bool DeclIsConvergent = Attrs.hasAttribute(Attribute::Convergent);
if (NotConvergent && DeclIsConvergent) {
report(Twine(TII->getName(Opcode), " used with a convergent intrinsic"),
MI);
diff --git a/llvm/lib/IR/Intrinsics.cpp b/llvm/lib/IR/Intrinsics.cpp
index 6e3c49b6d50b9..a0375c6508ec9 100644
--- a/llvm/lib/IR/Intrinsics.cpp
+++ b/llvm/lib/IR/Intrinsics.cpp
@@ -753,6 +753,14 @@ Intrinsic::ID Intrinsic::lookupIntrinsicID(StringRef Name) {
#include "llvm/IR/IntrinsicImpl.inc"
#undef GET_INTRINSIC_ATTRIBUTES
+AttributeSet Intrinsic::getFnAttributes(LLVMContext &C, ID id) {
+ if (id == 0)
+ return AttributeSet();
+ uint16_t PackedID = IntrinsicsToAttributesMap[id - 1];
+ uint8_t FnAttrID = PackedID >> 8;
+ return getIntrinsicFnAttributeSet(C, FnAttrID);
+}
+
Function *Intrinsic::getOrInsertDeclaration(Module *M, ID id,
ArrayRef<Type *> Tys) {
// There can never be multiple globals with the same name of different types,
diff --git a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
index 09f011410e0a4..bda5ca287d913 100644
--- a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+++ b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
@@ -1222,8 +1222,8 @@ bool SITargetLowering::getTgtMemIntrinsic(IntrinsicInfo &Info,
if (const AMDGPU::RsrcIntrinsic *RsrcIntr =
AMDGPU::lookupRsrcIntrinsic(IntrID)) {
- AttributeList Attr =
- Intrinsic::getAttributes(CI.getContext(), (Intrinsic::ID)IntrID);
+ AttributeSet Attr =
+ Intrinsic::getFnAttributes(CI.getContext(), (Intrinsic::ID)IntrID);
MemoryEffects ME = Attr.getMemoryEffects();
if (ME.doesNotAccessMemory())
return false;
diff --git a/llvm/lib/Transforms/Vectorize/VPlan.h b/llvm/lib/Transforms/Vectorize/VPlan.h
index 80b3d2a760293..3059b87ae63c8 100644
--- a/llvm/lib/Transforms/Vectorize/VPlan.h
+++ b/llvm/lib/Transforms/Vectorize/VPlan.h
@@ -1263,13 +1263,13 @@ class VPWidenIntrinsicRecipe : public VPRecipeWithIRFlags {
: VPRecipeWithIRFlags(VPDef::VPWidenIntrinsicSC, CallArguments, DL),
VectorIntrinsicID(VectorIntrinsicID), ResultTy(Ty) {
LLVMContext &Ctx = Ty->getContext();
- AttributeList Attrs = Intrinsic::getAttributes(Ctx, VectorIntrinsicID);
+ AttributeSet Attrs = Intrinsic::getFnAttributes(Ctx, VectorIntrinsicID);
MemoryEffects ME = Attrs.getMemoryEffects();
MayReadFromMemory = ME.onlyWritesMemory();
MayWriteToMemory = ME.onlyReadsMemory();
MayHaveSideEffects = MayWriteToMemory ||
- !Attrs.hasFnAttr(Attribute::NoUnwind) ||
- !Attrs.hasFnAttr(Attribute::WillReturn);
+ !Attrs.hasAttribute(Attribute::NoUnwind) ||
+ !Attrs.hasAttribute(Attribute::WillReturn);
}
~VPWidenIntrinsicRecipe() override = default;
diff --git a/llvm/lib/Transforms/Vectorize/VectorCombine.cpp b/llvm/lib/Transforms/Vectorize/VectorCombine.cpp
index 019d79567b4ae..4bfe41a5ed00d 100644
--- a/llvm/lib/Transforms/Vectorize/VectorCombine.cpp
+++ b/llvm/lib/Transforms/Vectorize/VectorCombine.cpp
@@ -995,8 +995,8 @@ bool VectorCombine::scalarizeVPIntrinsic(Instruction &I) {
// scalarizing it.
bool SafeToSpeculate;
if (ScalarIntrID)
- SafeToSpeculate = Intrinsic::getAttributes(I.getContext(), *ScalarIntrID)
- .hasFnAttr(Attribute::AttrKind::Speculatable);
+ SafeToSpeculate = Intrinsic::getFnAttributes(I.getContext(), *ScalarIntrID)
+ .hasAttribute(Attribute::AttrKind::Speculatable);
else
SafeToSpeculate = isSafeToSpeculativelyExecuteWithOpcode(
*FunctionalOpcode, &VPI, nullptr, &AC, &DT);
diff --git a/llvm/test/TableGen/intrinsic-attrs.td b/llvm/test/TableGen/intrinsic-attrs.td
index 579b5e8a21b86..689351a79237a 100644
--- a/llvm/test/TableGen/intrinsic-attrs.td
+++ b/llvm/test/TableGen/intrinsic-attrs.td
@@ -22,11 +22,11 @@ def int_deref_ptr_ret : Intrinsic<[llvm_ptr_ty], [], [Dereferenceable<RetIndex,
// CHECK-NEXT: Attribute::get(C, Attribute::NoUnwind),
// CHECK-NEXT: });
-
-// CHECK: getAttributes(LLVMContext &C, ID id)
+// CHECK: static constexpr uint16_t IntrinsicsToAttributesMap[] = {
// CHECK: 0 << 8 | 0, // llvm.deref.ptr.ret
// CHECK: 1 << 8 | 1, // llvm.random.gen
+// CHECK: getAttributes(LLVMContext &C, ID id)
// CHECK: case 1:
// CHECK-NEXT: return AttributeList::get(C, {
// CHECK-NEXT: {AttributeList::FunctionIndex, getIntrinsicFnAttributeSet(C, FnAttrID)}
diff --git a/llvm/utils/TableGen/Basic/IntrinsicEmitter.cpp b/llvm/utils/TableGen/Basic/IntrinsicEmitter.cpp
index 269d2a9544379..2497a5bf8529f 100644
--- a/llvm/utils/TableGen/Basic/IntrinsicEmitter.cpp
+++ b/llvm/utils/TableGen/Basic/IntrinsicEmitter.cpp
@@ -555,8 +555,6 @@ static AttributeSet getIntrinsicFnAttributeSet(LLVMContext &C, unsigned ID) {
default: llvm_unreachable("Invalid attribute set number");)";
for (const CodeGenIntrinsic &Int : Ints) {
- if (!hasFnAttributes(Int))
- continue;
unsigned ID = UniqFnAttributes.size();
if (!UniqFnAttributes.try_emplace(&Int, ID).second)
continue;
@@ -606,8 +604,7 @@ static AttributeSet getIntrinsicFnAttributeSet(LLVMContext &C, unsigned ID) {
}
} // getIntrinsicFnAttributeSet
-AttributeList Intrinsic::getAttributes(LLVMContext &C, ID id) {
-)";
+static constexpr uint16_t IntrinsicsToAttributesMap[] = {)";
// Compute the maximum number of attribute arguments and the map. For function
// attributes, we only consider whether the intrinsics has any function
@@ -619,6 +616,14 @@ AttributeList Intrinsic::getAttributes(LLVMContext &C, ID id) {
UniqAttributes.try_emplace(&Int, ID);
}
+ // Emit an array of AttributeList. Most intrinsics will have at least one
+ // entry, for the function itself (index ~1), which is usually nounwind.
+ for (const CodeGenIntrinsic &Int : Ints) {
+ uint16_t FnAttrIndex = UniqFnAttributes[&Int];
+ OS << formatv("\n {} << 8 | {}, // {}", FnAttrIndex,
+ UniqAttributes[&Int], Int.Name);
+ }
+
// Assign a 16-bit packed ID for each intrinsic. The lower 8-bits will be its
// "argument attribute ID" (index in UniqAttributes) and upper 8 bits will be
// its "function attribute ID" (index in UniqFnAttributes).
@@ -627,17 +632,12 @@ AttributeList Intrinsic::getAttributes(LLVMContext &C, ID id) {
if (UniqFnAttributes.size() > 256)
PrintFatalError("Too many unique function attributes for table!");
- // Emit an array of AttributeList. Most intrinsics will have at least one
- // entry, for the function itself (index ~1), which is usually nounwind.
- OS << " static constexpr uint16_t IntrinsicsToAttributesMap[] = {";
- for (const CodeGenIntrinsic &Int : Ints) {
- uint16_t FnAttrIndex = hasFnAttributes(Int) ? UniqFnAttributes[&Int] : 0;
- OS << formatv("\n {} << 8 | {}, // {}", FnAttrIndex,
- UniqAttributes[&Int], Int.Name);
- }
+ OS << R"(
+};
+
+AttributeList Intrinsic::getAttributes(LLVMContext &C, ID id) {)";
OS << formatv(R"(
- };
if (id == 0)
return AttributeList();
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