[llvm] [AArch64][CodeGen] Add +lsfe atomicrmw tests where the result is unused. (PR #132022)
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Wed Mar 19 06:32:18 PDT 2025
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``````````bash
darker --check --diff -r 75ab43b70eef125dbdf1586143fad88a2a61170e...068e156b5869b914495cd71deaf5b13609c254ce llvm/test/CodeGen/AArch64/Atomics/generate-tests.py
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View the diff from darker here.
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``````````diff
--- generate-tests.py 2025-03-19 13:22:43.000000 +0000
+++ generate-tests.py 2025-03-19 13:31:18.036798 +0000
@@ -188,25 +188,25 @@
fp = os.path.relpath(__file__, os.path.abspath(os.path.join(__file__, top)))
return fp
def generate_unused_res_test(featname, ordering, op, alignval):
- if featname != 'lsfe' or op == 'fsub' or alignval == 1:
- return False
- if ordering not in [AtomicOrder.monotonic, AtomicOrder.release]:
- return False
- return True;
+ if featname != "lsfe" or op == "fsub" or alignval == 1:
+ return False
+ if ordering not in [AtomicOrder.monotonic, AtomicOrder.release]:
+ return False
+ return True
def align(val, aligned: bool) -> int:
return val if aligned else 1
def all_atomicrmw(f, datatype, atomicrmw_ops, featname):
instr = "atomicrmw"
- generate_unused = False;
- tests = [];
+ generate_unused = False
+ tests = []
for op in atomicrmw_ops:
for aligned in Aligned:
for ty, val in datatype:
alignval = align(val, aligned)
for ordering in ATOMICRMW_ORDERS:
@@ -220,30 +220,32 @@
}}
"""
)
)
if generate_unused_res_test(featname, ordering, op, alignval):
- generate_unused = True;
+ generate_unused = True
name = f"atomicrmw_{op}_{ty}_{aligned}_{ordering}_unused"
tests.append(
- textwrap.dedent(
- f"""
+ textwrap.dedent(
+ f"""
define dso_local void @{name}(ptr %ptr, {ty} %value) {{
%r = {instr} {op} ptr %ptr, {ty} %value {ordering}, align {alignval}
ret void
}}
"""
- )
+ )
)
if generate_unused:
- f.write("\n; NOTE: '_unused' tests are added to ensure we do not lower to "
- "ST[F]ADD when the destination register is WZR/XZR.\n"
- "; See discussion on https://github.com/llvm/llvm-project/pull/131174\n")
+ f.write(
+ "\n; NOTE: '_unused' tests are added to ensure we do not lower to "
+ "ST[F]ADD when the destination register is WZR/XZR.\n"
+ "; See discussion on https://github.com/llvm/llvm-project/pull/131174\n"
+ )
for test in tests:
- f.write(test)
+ f.write(test)
def all_load(f):
for aligned in Aligned:
for ty, val in Type:
``````````
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https://github.com/llvm/llvm-project/pull/132022
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