[llvm] 3eddb99 - [AMDGPU] Fix a crash by skipping DBG instrs at start of sched region (#131167)

[via llvm-commits]

Author: Emma Pilkington
Date: 2025-03-19T09:31:54-04:00
New Revision: 3eddb992d08b30832d2cc0908483f10fe133935a

URL: https://github.com/llvm/llvm-project/commit/3eddb992d08b30832d2cc0908483f10fe133935a
DIFF: https://github.com/llvm/llvm-project/commit/3eddb992d08b30832d2cc0908483f10fe133935a.diff

LOG: [AMDGPU] Fix a crash by skipping DBG instrs at start of sched region (#131167)

Fixes SWDEV-514946

Added: 
    llvm/test/CodeGen/AMDGPU/dbg-value-starts-sched-region.mir

Modified: 
    llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp b/llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
index 2fd015e499924..ce8a044715573 100644
--- a/llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
+++ b/llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
@@ -873,6 +873,8 @@ void GCNScheduleDAGMILive::computeBlockPressure(unsigned RegionIdx,
       Pressure[CurRegion] = RPTracker.moveMaxPressure();
       if (CurRegion-- == RegionIdx)
         break;
+      auto &Rgn = Regions[CurRegion];
+      NonDbgMI = &*skipDebugInstructionsForward(Rgn.first, Rgn.second);
     }
     RPTracker.advanceToNext();
     RPTracker.advanceBeforeNext();

diff  --git a/llvm/test/CodeGen/AMDGPU/dbg-value-starts-sched-region.mir b/llvm/test/CodeGen/AMDGPU/dbg-value-starts-sched-region.mir
new file mode 100644
index 0000000000000..0785fe31d63b4
--- /dev/null
+++ b/llvm/test/CodeGen/AMDGPU/dbg-value-starts-sched-region.mir
@@ -0,0 +1,27 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
+# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx942 -verify-misched -run-pass=machine-scheduler -o - %s | FileCheck %s
+
+# Verify we maintain live-ins even if the first instruction in sched region is
+# DBG_.
+
+---
+name:            sched
+tracksRegLiveness: true
+body:             |
+  bb.0:
+    ; CHECK-LABEL: name: sched
+    ; CHECK: [[DEF:%[0-9]+]]:sgpr_32 = IMPLICIT_DEF
+    ; CHECK-NEXT: S_NOP 0
+    ; CHECK-NEXT: SCHED_BARRIER 0
+    ; CHECK-NEXT: DBG_VALUE
+    ; CHECK-NEXT: dead [[COPY:%[0-9]+]]:sgpr_32 = COPY [[DEF]]
+    ; CHECK-NEXT: S_NOP 0
+    ; CHECK-NEXT: S_ENDPGM 0
+    %0:sgpr_32 = IMPLICIT_DEF
+    S_NOP 0
+    SCHED_BARRIER 0
+    DBG_VALUE
+    dead %1:sgpr_32 = COPY %0
+    S_NOP 0
+    S_ENDPGM 0
+...