[llvm] [AMDGPU] Try to reuse in v_cndmask register with constant from compare. (PR #131146)
Jay Foad via llvm-commits
llvm-commits at lists.llvm.org
Wed Mar 19 04:14:28 PDT 2025
jayfoad wrote:
> > > > Is this going to match `X == +0.0 ? X : Y` -> `X == +0.0 ? +0.0 : Y`? That would be wrong, because if X is -0.0 then the first one evaluates to -0.0 and the second one evaluates to +0.0.
> > >
> > >
> > > `X == Const ? X : Y -> X == Const ? Const : Y` optimisation is performed in InstCombine on llvm ir. Here I try to dial with cases it can degrade performance.
> > > I double-checked the case `X == +0.0 ? X : Y` and actually InstCombine doesn't touch such operations and doesn't transform in to `X == +0.0 ? +0.0 : Y`, so there is no such issue.
> >
> >
> > OK, so InstCombine is not broken, but _this_ patch will try to do the equivalent transformation, so _this_ patch is broken.
>
> This patch deals with result of InstCombine that started to optimize more cases and tries to revert this transform at machine IR stage (in terms of ternary operation `X == Const ? Const : Y -> X == Const ? X : Y`).
>
> I've just added tests to check this case: For `X == +0.0 ? X : Y` case InstCombine doesn't transform it and so the patch doesn't process such cndmask instruction. For `X == +0.0 ? +0.0 : Y` case InstCombine also doesn't transform it, but imm 0.0 is encoded into cmp and cndmask instructions before the patch so it just ignores the case.
This pass should handle all MIR correctly, not just the MIR that we currently see as a result of how InstCombine behaves today.
https://github.com/llvm/llvm-project/pull/131146
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