[llvm] 1d7c460 - [RISCV] Set isTrap for EBREAK and {C_, }UNIMP (#131636)

[via llvm-commits]

Author: Alex Bradbury
Date: 2025-03-19T10:36:07Z
New Revision: 1d7c4609445cb0a8330ee06b836d3c873d7f12bb

URL: https://github.com/llvm/llvm-project/commit/1d7c4609445cb0a8330ee06b836d3c873d7f12bb
DIFF: https://github.com/llvm/llvm-project/commit/1d7c4609445cb0a8330ee06b836d3c873d7f12bb.diff

LOG: [RISCV] Set isTrap for EBREAK and {C_,}UNIMP (#131636)

This is done for completeness. The property isn't used in upstream
llvm/, although it is queried in BOLT in MCPlusBuilder.cpp.

Added: 
    

Modified: 
    llvm/lib/Target/RISCV/RISCVInstrInfo.td
    llvm/lib/Target/RISCV/RISCVInstrInfoC.td

Removed: 
    


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diff  --git a/llvm/lib/Target/RISCV/RISCVInstrInfo.td b/llvm/lib/Target/RISCV/RISCVInstrInfo.td
index 11d93892ee7a5..6be4fb1db602d 100644
--- a/llvm/lib/Target/RISCV/RISCVInstrInfo.td
+++ b/llvm/lib/Target/RISCV/RISCVInstrInfo.td
@@ -752,6 +752,7 @@ def ECALL : RVInstI<0b000, OPC_SYSTEM, (outs), (ins), "ecall", "">, Sched<[Write
   let imm12 = 0;
 }
 
+let isTrap = 1 in
 def EBREAK : RVInstI<0b000, OPC_SYSTEM, (outs), (ins), "ebreak", "">,
              Sched<[]> {
   let rs1 = 0;
@@ -762,6 +763,7 @@ def EBREAK : RVInstI<0b000, OPC_SYSTEM, (outs), (ins), "ebreak", "">,
 // This is a de facto standard (as set by GNU binutils) 32-bit unimplemented
 // instruction (i.e., it should always trap, if your implementation has invalid
 // instruction traps).
+let isTrap = 1 in
 def UNIMP : RVInstI<0b001, OPC_SYSTEM, (outs), (ins), "unimp", "">,
             Sched<[]> {
   let rs1 = 0;

diff  --git a/llvm/lib/Target/RISCV/RISCVInstrInfoC.td b/llvm/lib/Target/RISCV/RISCVInstrInfoC.td
index 19f694af071a3..b3eca8ff89904 100644
--- a/llvm/lib/Target/RISCV/RISCVInstrInfoC.td
+++ b/llvm/lib/Target/RISCV/RISCVInstrInfoC.td
@@ -596,7 +596,7 @@ def C_SDSP : CStackStore<0b111, "c.sdsp", GPR, uimm9_lsb000>,
 
 // The all zeros pattern isn't a valid RISC-V instruction. It's used by GNU
 // binutils as 16-bit instruction known to be unimplemented (i.e., trapping).
-let hasSideEffects = 1, mayLoad = 0, mayStore = 0 in
+let hasSideEffects = 1, mayLoad = 0, mayStore = 0, isTrap = 1 in
 def C_UNIMP : RVInst16<(outs), (ins), "c.unimp", "", [], InstFormatOther>,
               Sched<[]> {
   let Inst{15-0} = 0;