[llvm] [SelectionDAG][RISCV] Avoid store merging across function calls (PR #130430)

[Philip Reames via llvm-commits]

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@@ -3506,6 +3506,10 @@ class TargetLoweringBase {
   /// The default implementation just freezes the set of reserved registers.
   virtual void finalizeLowering(MachineFunction &MF) const;
 
+  /// Returns true if it's profitable to allow merging store of loads when there
+  /// are functions calls between the load and the store.
+  virtual bool shouldMergeStoreOfLoadsOverCall(EVT) const { return true; }
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preames wrote:

Please add a second argument to this function.  You should have "EVT SrcVT, EVT MergedVT"

https://github.com/llvm/llvm-project/pull/130430