[llvm] [PowerPC] Support conversion between f16 and f128 (PR #130158)
Lei Huang via llvm-commits
llvm-commits at lists.llvm.org
Tue Mar 18 12:06:31 PDT 2025
https://github.com/lei137 updated https://github.com/llvm/llvm-project/pull/130158
>From 522a2f03e12a74e0a4d9e6d62470cb538b792fe4 Mon Sep 17 00:00:00 2001
From: esmeyi <esme.yi at ibm.com>
Date: Thu, 4 Jul 2024 01:05:39 -0400
Subject: [PATCH 1/7] F16 and f128 conversion.
---
llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 6 ++
llvm/lib/Target/PowerPC/PPCInstrVSX.td | 8 ++
llvm/test/CodeGen/PowerPC/f16-to-from-f128.ll | 102 ++++++++++++++++++
3 files changed, 116 insertions(+)
create mode 100644 llvm/test/CodeGen/PowerPC/f16-to-from-f128.ll
diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
index 91df5f467e59c..505988b4da963 100644
--- a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
+++ b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -224,18 +224,24 @@ PPCTargetLowering::PPCTargetLowering(const PPCTargetMachine &TM,
}
if (Subtarget.isISA3_0()) {
+ setLoadExtAction(ISD::EXTLOAD, MVT::f128, MVT::f16, Legal);
setLoadExtAction(ISD::EXTLOAD, MVT::f64, MVT::f16, Legal);
setLoadExtAction(ISD::EXTLOAD, MVT::f32, MVT::f16, Legal);
+ setTruncStoreAction(MVT::f128, MVT::f16, Legal);
setTruncStoreAction(MVT::f64, MVT::f16, Legal);
setTruncStoreAction(MVT::f32, MVT::f16, Legal);
} else {
// No extending loads from f16 or HW conversions back and forth.
+ setLoadExtAction(ISD::EXTLOAD, MVT::f128, MVT::f16, Expand);
+ setOperationAction(ISD::FP16_TO_FP, MVT::f128, Expand);
+ setOperationAction(ISD::FP_TO_FP16, MVT::f128, Expand);
setLoadExtAction(ISD::EXTLOAD, MVT::f64, MVT::f16, Expand);
setOperationAction(ISD::FP16_TO_FP, MVT::f64, Expand);
setOperationAction(ISD::FP_TO_FP16, MVT::f64, Expand);
setLoadExtAction(ISD::EXTLOAD, MVT::f32, MVT::f16, Expand);
setOperationAction(ISD::FP16_TO_FP, MVT::f32, Expand);
setOperationAction(ISD::FP_TO_FP16, MVT::f32, Expand);
+ setTruncStoreAction(MVT::f128, MVT::f16, Expand);
setTruncStoreAction(MVT::f64, MVT::f16, Expand);
setTruncStoreAction(MVT::f32, MVT::f16, Expand);
}
diff --git a/llvm/lib/Target/PowerPC/PPCInstrVSX.td b/llvm/lib/Target/PowerPC/PPCInstrVSX.td
index d9e88b283a749..83396949f26bf 100644
--- a/llvm/lib/Target/PowerPC/PPCInstrVSX.td
+++ b/llvm/lib/Target/PowerPC/PPCInstrVSX.td
@@ -3995,6 +3995,10 @@ defm : ScalToVecWPermute<
(SUBREG_TO_REG (i64 1), (VEXTSH2Ds (LXSIHZX ForceXForm:$src)), sub_64)>;
// Load/convert and convert/store patterns for f16.
+def : Pat<(f128 (extloadf16 ForceXForm:$src)),
+ (f128 (XSCVDPQP (XSCVHPDP (LXSIHZX ForceXForm:$src))))>;
+def : Pat<(truncstoref16 f128:$src, ForceXForm:$dst),
+ (STXSIHX (XSCVDPHP (XSCVQPDP $src)), ForceXForm:$dst)>;
def : Pat<(f64 (extloadf16 ForceXForm:$src)),
(f64 (XSCVHPDP (LXSIHZX ForceXForm:$src)))>;
def : Pat<(truncstoref16 f64:$src, ForceXForm:$dst),
@@ -4003,6 +4007,8 @@ def : Pat<(f32 (extloadf16 ForceXForm:$src)),
(f32 (COPY_TO_REGCLASS (XSCVHPDP (LXSIHZX ForceXForm:$src)), VSSRC))>;
def : Pat<(truncstoref16 f32:$src, ForceXForm:$dst),
(STXSIHX (XSCVDPHP (COPY_TO_REGCLASS $src, VSFRC)), ForceXForm:$dst)>;
+def : Pat<(f128 (f16_to_fp i32:$A)),
+ (f128 (XSCVDPQP (XSCVHPDP (MTVSRWZ $A))))>;
def : Pat<(f64 (f16_to_fp i32:$A)),
(f64 (XSCVHPDP (MTVSRWZ $A)))>;
def : Pat<(f32 (f16_to_fp i32:$A)),
@@ -4010,6 +4016,8 @@ def : Pat<(f32 (f16_to_fp i32:$A)),
def : Pat<(i32 (fp_to_f16 f32:$A)),
(i32 (MFVSRWZ (XSCVDPHP (COPY_TO_REGCLASS $A, VSFRC))))>;
def : Pat<(i32 (fp_to_f16 f64:$A)), (i32 (MFVSRWZ (XSCVDPHP $A)))>;
+def : Pat<(i32 (fp_to_f16 f128:$A)),
+ (i32 (MFVSRWZ (XSCVDPHP (XSCVQPDP $A))))>;
// Vector sign extensions
def : Pat<(f64 (PPCVexts f64:$A, 1)),
diff --git a/llvm/test/CodeGen/PowerPC/f16-to-from-f128.ll b/llvm/test/CodeGen/PowerPC/f16-to-from-f128.ll
new file mode 100644
index 0000000000000..4f1e7da09b820
--- /dev/null
+++ b/llvm/test/CodeGen/PowerPC/f16-to-from-f128.ll
@@ -0,0 +1,102 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
+; RUN: llc -mcpu=pwr8 -mtriple=powerpc64le-unknown-unknown \
+; RUN: -verify-machineinstrs -ppc-asm-full-reg-names < %s | FileCheck %s \
+; RUN: --check-prefix=P8
+; RUN: llc -mcpu=pwr9 -mtriple=powerpc64le-unknown-unknown \
+; RUN: -verify-machineinstrs -ppc-asm-full-reg-names < %s | FileCheck %s
+; RUN: llc -mcpu=pwr9 -mtriple=powerpc64le-unknown-unknown -mattr=-hard-float \
+; RUN: -verify-machineinstrs -ppc-asm-full-reg-names < %s | FileCheck %s \
+; RUN: --check-prefix=SOFT
+
+define half @trunc(fp128 %a) unnamed_addr {
+; P8-LABEL: trunc:
+; P8: # %bb.0: # %entry
+; P8-NEXT: mflr r0
+; P8-NEXT: stdu r1, -32(r1)
+; P8-NEXT: std r0, 48(r1)
+; P8-NEXT: .cfi_def_cfa_offset 32
+; P8-NEXT: .cfi_offset lr, 16
+; P8-NEXT: bl __trunctfhf2
+; P8-NEXT: nop
+; P8-NEXT: clrldi r3, r3, 48
+; P8-NEXT: bl __gnu_h2f_ieee
+; P8-NEXT: nop
+; P8-NEXT: addi r1, r1, 32
+; P8-NEXT: ld r0, 16(r1)
+; P8-NEXT: mtlr r0
+; P8-NEXT: blr
+;
+; CHECK-LABEL: trunc:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: xscvqpdp v2, v2
+; CHECK-NEXT: xscvdphp f0, vs34
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: clrlwi r3, r3, 16
+; CHECK-NEXT: mtfprwz f0, r3
+; CHECK-NEXT: xscvhpdp f1, f0
+; CHECK-NEXT: blr
+;
+; SOFT-LABEL: trunc:
+; SOFT: # %bb.0: # %entry
+; SOFT-NEXT: mflr r0
+; SOFT-NEXT: stdu r1, -32(r1)
+; SOFT-NEXT: std r0, 48(r1)
+; SOFT-NEXT: .cfi_def_cfa_offset 32
+; SOFT-NEXT: .cfi_offset lr, 16
+; SOFT-NEXT: bl __trunctfhf2
+; SOFT-NEXT: nop
+; SOFT-NEXT: clrldi r3, r3, 48
+; SOFT-NEXT: bl __gnu_h2f_ieee
+; SOFT-NEXT: nop
+; SOFT-NEXT: bl __gnu_f2h_ieee
+; SOFT-NEXT: nop
+; SOFT-NEXT: addi r1, r1, 32
+; SOFT-NEXT: ld r0, 16(r1)
+; SOFT-NEXT: mtlr r0
+; SOFT-NEXT: blr
+entry:
+ %0 = fptrunc fp128 %a to half
+ ret half %0
+}
+
+define fp128 @ext(half %a) unnamed_addr {
+; P8-LABEL: ext:
+; P8: # %bb.0: # %entry
+; P8-NEXT: mflr r0
+; P8-NEXT: stdu r1, -32(r1)
+; P8-NEXT: std r0, 48(r1)
+; P8-NEXT: .cfi_def_cfa_offset 32
+; P8-NEXT: .cfi_offset lr, 16
+; P8-NEXT: bl __extendsfkf2
+; P8-NEXT: nop
+; P8-NEXT: addi r1, r1, 32
+; P8-NEXT: ld r0, 16(r1)
+; P8-NEXT: mtlr r0
+; P8-NEXT: blr
+;
+; CHECK-LABEL: ext:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: xscpsgndp vs34, f1, f1
+; CHECK-NEXT: xscvdpqp v2, v2
+; CHECK-NEXT: blr
+;
+; SOFT-LABEL: ext:
+; SOFT: # %bb.0: # %entry
+; SOFT-NEXT: mflr r0
+; SOFT-NEXT: stdu r1, -32(r1)
+; SOFT-NEXT: std r0, 48(r1)
+; SOFT-NEXT: .cfi_def_cfa_offset 32
+; SOFT-NEXT: .cfi_offset lr, 16
+; SOFT-NEXT: clrldi r3, r3, 48
+; SOFT-NEXT: bl __gnu_h2f_ieee
+; SOFT-NEXT: nop
+; SOFT-NEXT: bl __extendsfkf2
+; SOFT-NEXT: nop
+; SOFT-NEXT: addi r1, r1, 32
+; SOFT-NEXT: ld r0, 16(r1)
+; SOFT-NEXT: mtlr r0
+; SOFT-NEXT: blr
+entry:
+ %0 = fpext half %a to fp128
+ ret fp128 %0
+}
>From 864b9ac95ac70c9809cd9c86035a971271c56fac Mon Sep 17 00:00:00 2001
From: esmeyi <esme.yi at ibm.com>
Date: Thu, 25 Jul 2024 01:11:05 -0400
Subject: [PATCH 2/7] For truncation from f128 to f16, always use the lib
fucntion (direct conversion) instead of HW instructions (stepwise
conversion).
---
llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 6 +++---
llvm/lib/Target/PowerPC/PPCInstrVSX.td | 4 ----
llvm/test/CodeGen/PowerPC/f16-to-from-f128.ll | 13 ++++++++++---
3 files changed, 13 insertions(+), 10 deletions(-)
diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
index 505988b4da963..ab78f33f5a630 100644
--- a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
+++ b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -223,25 +223,25 @@ PPCTargetLowering::PPCTargetLowering(const PPCTargetMachine &TM,
setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i8, Expand);
}
+ setTruncStoreAction(MVT::f128, MVT::f16, Expand);
+ setOperationAction(ISD::FP_TO_FP16, MVT::f128, Expand);
+
if (Subtarget.isISA3_0()) {
setLoadExtAction(ISD::EXTLOAD, MVT::f128, MVT::f16, Legal);
setLoadExtAction(ISD::EXTLOAD, MVT::f64, MVT::f16, Legal);
setLoadExtAction(ISD::EXTLOAD, MVT::f32, MVT::f16, Legal);
- setTruncStoreAction(MVT::f128, MVT::f16, Legal);
setTruncStoreAction(MVT::f64, MVT::f16, Legal);
setTruncStoreAction(MVT::f32, MVT::f16, Legal);
} else {
// No extending loads from f16 or HW conversions back and forth.
setLoadExtAction(ISD::EXTLOAD, MVT::f128, MVT::f16, Expand);
setOperationAction(ISD::FP16_TO_FP, MVT::f128, Expand);
- setOperationAction(ISD::FP_TO_FP16, MVT::f128, Expand);
setLoadExtAction(ISD::EXTLOAD, MVT::f64, MVT::f16, Expand);
setOperationAction(ISD::FP16_TO_FP, MVT::f64, Expand);
setOperationAction(ISD::FP_TO_FP16, MVT::f64, Expand);
setLoadExtAction(ISD::EXTLOAD, MVT::f32, MVT::f16, Expand);
setOperationAction(ISD::FP16_TO_FP, MVT::f32, Expand);
setOperationAction(ISD::FP_TO_FP16, MVT::f32, Expand);
- setTruncStoreAction(MVT::f128, MVT::f16, Expand);
setTruncStoreAction(MVT::f64, MVT::f16, Expand);
setTruncStoreAction(MVT::f32, MVT::f16, Expand);
}
diff --git a/llvm/lib/Target/PowerPC/PPCInstrVSX.td b/llvm/lib/Target/PowerPC/PPCInstrVSX.td
index 83396949f26bf..19448210f5db1 100644
--- a/llvm/lib/Target/PowerPC/PPCInstrVSX.td
+++ b/llvm/lib/Target/PowerPC/PPCInstrVSX.td
@@ -3997,8 +3997,6 @@ defm : ScalToVecWPermute<
// Load/convert and convert/store patterns for f16.
def : Pat<(f128 (extloadf16 ForceXForm:$src)),
(f128 (XSCVDPQP (XSCVHPDP (LXSIHZX ForceXForm:$src))))>;
-def : Pat<(truncstoref16 f128:$src, ForceXForm:$dst),
- (STXSIHX (XSCVDPHP (XSCVQPDP $src)), ForceXForm:$dst)>;
def : Pat<(f64 (extloadf16 ForceXForm:$src)),
(f64 (XSCVHPDP (LXSIHZX ForceXForm:$src)))>;
def : Pat<(truncstoref16 f64:$src, ForceXForm:$dst),
@@ -4016,8 +4014,6 @@ def : Pat<(f32 (f16_to_fp i32:$A)),
def : Pat<(i32 (fp_to_f16 f32:$A)),
(i32 (MFVSRWZ (XSCVDPHP (COPY_TO_REGCLASS $A, VSFRC))))>;
def : Pat<(i32 (fp_to_f16 f64:$A)), (i32 (MFVSRWZ (XSCVDPHP $A)))>;
-def : Pat<(i32 (fp_to_f16 f128:$A)),
- (i32 (MFVSRWZ (XSCVDPHP (XSCVQPDP $A))))>;
// Vector sign extensions
def : Pat<(f64 (PPCVexts f64:$A, 1)),
diff --git a/llvm/test/CodeGen/PowerPC/f16-to-from-f128.ll b/llvm/test/CodeGen/PowerPC/f16-to-from-f128.ll
index 4f1e7da09b820..43e08627012e9 100644
--- a/llvm/test/CodeGen/PowerPC/f16-to-from-f128.ll
+++ b/llvm/test/CodeGen/PowerPC/f16-to-from-f128.ll
@@ -28,12 +28,19 @@ define half @trunc(fp128 %a) unnamed_addr {
;
; CHECK-LABEL: trunc:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: xscvqpdp v2, v2
-; CHECK-NEXT: xscvdphp f0, vs34
-; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: mflr r0
+; CHECK-NEXT: stdu r1, -32(r1)
+; CHECK-NEXT: std r0, 48(r1)
+; CHECK-NEXT: .cfi_def_cfa_offset 32
+; CHECK-NEXT: .cfi_offset lr, 16
+; CHECK-NEXT: bl __trunctfhf2
+; CHECK-NEXT: nop
; CHECK-NEXT: clrlwi r3, r3, 16
; CHECK-NEXT: mtfprwz f0, r3
; CHECK-NEXT: xscvhpdp f1, f0
+; CHECK-NEXT: addi r1, r1, 32
+; CHECK-NEXT: ld r0, 16(r1)
+; CHECK-NEXT: mtlr r0
; CHECK-NEXT: blr
;
; SOFT-LABEL: trunc:
>From 2b2f0907879f9b1ce0562bda797513f2c3e760cc Mon Sep 17 00:00:00 2001
From: esmeyi <esme.yi at ibm.com>
Date: Thu, 25 Jul 2024 01:44:14 -0400
Subject: [PATCH 3/7] Updated tests.
---
llvm/test/CodeGen/PowerPC/f128-conv.ll | 64 ++++++++++
llvm/test/CodeGen/PowerPC/f16-to-from-f128.ll | 109 ------------------
llvm/test/CodeGen/PowerPC/fp128-libcalls.ll | 17 +++
3 files changed, 81 insertions(+), 109 deletions(-)
delete mode 100644 llvm/test/CodeGen/PowerPC/f16-to-from-f128.ll
diff --git a/llvm/test/CodeGen/PowerPC/f128-conv.ll b/llvm/test/CodeGen/PowerPC/f128-conv.ll
index d8eed1fb4092c..81045a4291a00 100644
--- a/llvm/test/CodeGen/PowerPC/f128-conv.ll
+++ b/llvm/test/CodeGen/PowerPC/f128-conv.ll
@@ -1450,6 +1450,70 @@ entry:
ret void
}
+define half @trunc(fp128 %a) unnamed_addr {
+; CHECK-LABEL: trunc:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mflr r0
+; CHECK-NEXT: stdu r1, -32(r1)
+; CHECK-NEXT: std r0, 48(r1)
+; CHECK-NEXT: .cfi_def_cfa_offset 32
+; CHECK-NEXT: .cfi_offset lr, 16
+; CHECK-NEXT: bl __trunctfhf2
+; CHECK-NEXT: nop
+; CHECK-NEXT: clrlwi r3, r3, 16
+; CHECK-NEXT: mtfprwz f0, r3
+; CHECK-NEXT: xscvhpdp f1, f0
+; CHECK-NEXT: addi r1, r1, 32
+; CHECK-NEXT: ld r0, 16(r1)
+; CHECK-NEXT: mtlr r0
+; CHECK-NEXT: blr
+;
+; CHECK-P8-LABEL: trunc:
+; CHECK-P8: # %bb.0: # %entry
+; CHECK-P8-NEXT: mflr r0
+; CHECK-P8-NEXT: stdu r1, -32(r1)
+; CHECK-P8-NEXT: std r0, 48(r1)
+; CHECK-P8-NEXT: .cfi_def_cfa_offset 32
+; CHECK-P8-NEXT: .cfi_offset lr, 16
+; CHECK-P8-NEXT: bl __trunctfhf2
+; CHECK-P8-NEXT: nop
+; CHECK-P8-NEXT: clrldi r3, r3, 48
+; CHECK-P8-NEXT: bl __gnu_h2f_ieee
+; CHECK-P8-NEXT: nop
+; CHECK-P8-NEXT: addi r1, r1, 32
+; CHECK-P8-NEXT: ld r0, 16(r1)
+; CHECK-P8-NEXT: mtlr r0
+; CHECK-P8-NEXT: blr
+entry:
+ %0 = fptrunc fp128 %a to half
+ ret half %0
+}
+
+define fp128 @ext(half %a) unnamed_addr {
+; CHECK-LABEL: ext:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: xscpsgndp v2, f1, f1
+; CHECK-NEXT: xscvdpqp v2, v2
+; CHECK-NEXT: blr
+;
+; CHECK-P8-LABEL: ext:
+; CHECK-P8: # %bb.0: # %entry
+; CHECK-P8-NEXT: mflr r0
+; CHECK-P8-NEXT: stdu r1, -32(r1)
+; CHECK-P8-NEXT: std r0, 48(r1)
+; CHECK-P8-NEXT: .cfi_def_cfa_offset 32
+; CHECK-P8-NEXT: .cfi_offset lr, 16
+; CHECK-P8-NEXT: bl __extendsfkf2
+; CHECK-P8-NEXT: nop
+; CHECK-P8-NEXT: addi r1, r1, 32
+; CHECK-P8-NEXT: ld r0, 16(r1)
+; CHECK-P8-NEXT: mtlr r0
+; CHECK-P8-NEXT: blr
+entry:
+ %0 = fpext half %a to fp128
+ ret fp128 %0
+}
+
@f128Glob = common global fp128 0xL00000000000000000000000000000000, align 16
; Function Attrs: norecurse nounwind readnone
diff --git a/llvm/test/CodeGen/PowerPC/f16-to-from-f128.ll b/llvm/test/CodeGen/PowerPC/f16-to-from-f128.ll
deleted file mode 100644
index 43e08627012e9..0000000000000
--- a/llvm/test/CodeGen/PowerPC/f16-to-from-f128.ll
+++ /dev/null
@@ -1,109 +0,0 @@
-; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc -mcpu=pwr8 -mtriple=powerpc64le-unknown-unknown \
-; RUN: -verify-machineinstrs -ppc-asm-full-reg-names < %s | FileCheck %s \
-; RUN: --check-prefix=P8
-; RUN: llc -mcpu=pwr9 -mtriple=powerpc64le-unknown-unknown \
-; RUN: -verify-machineinstrs -ppc-asm-full-reg-names < %s | FileCheck %s
-; RUN: llc -mcpu=pwr9 -mtriple=powerpc64le-unknown-unknown -mattr=-hard-float \
-; RUN: -verify-machineinstrs -ppc-asm-full-reg-names < %s | FileCheck %s \
-; RUN: --check-prefix=SOFT
-
-define half @trunc(fp128 %a) unnamed_addr {
-; P8-LABEL: trunc:
-; P8: # %bb.0: # %entry
-; P8-NEXT: mflr r0
-; P8-NEXT: stdu r1, -32(r1)
-; P8-NEXT: std r0, 48(r1)
-; P8-NEXT: .cfi_def_cfa_offset 32
-; P8-NEXT: .cfi_offset lr, 16
-; P8-NEXT: bl __trunctfhf2
-; P8-NEXT: nop
-; P8-NEXT: clrldi r3, r3, 48
-; P8-NEXT: bl __gnu_h2f_ieee
-; P8-NEXT: nop
-; P8-NEXT: addi r1, r1, 32
-; P8-NEXT: ld r0, 16(r1)
-; P8-NEXT: mtlr r0
-; P8-NEXT: blr
-;
-; CHECK-LABEL: trunc:
-; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: mflr r0
-; CHECK-NEXT: stdu r1, -32(r1)
-; CHECK-NEXT: std r0, 48(r1)
-; CHECK-NEXT: .cfi_def_cfa_offset 32
-; CHECK-NEXT: .cfi_offset lr, 16
-; CHECK-NEXT: bl __trunctfhf2
-; CHECK-NEXT: nop
-; CHECK-NEXT: clrlwi r3, r3, 16
-; CHECK-NEXT: mtfprwz f0, r3
-; CHECK-NEXT: xscvhpdp f1, f0
-; CHECK-NEXT: addi r1, r1, 32
-; CHECK-NEXT: ld r0, 16(r1)
-; CHECK-NEXT: mtlr r0
-; CHECK-NEXT: blr
-;
-; SOFT-LABEL: trunc:
-; SOFT: # %bb.0: # %entry
-; SOFT-NEXT: mflr r0
-; SOFT-NEXT: stdu r1, -32(r1)
-; SOFT-NEXT: std r0, 48(r1)
-; SOFT-NEXT: .cfi_def_cfa_offset 32
-; SOFT-NEXT: .cfi_offset lr, 16
-; SOFT-NEXT: bl __trunctfhf2
-; SOFT-NEXT: nop
-; SOFT-NEXT: clrldi r3, r3, 48
-; SOFT-NEXT: bl __gnu_h2f_ieee
-; SOFT-NEXT: nop
-; SOFT-NEXT: bl __gnu_f2h_ieee
-; SOFT-NEXT: nop
-; SOFT-NEXT: addi r1, r1, 32
-; SOFT-NEXT: ld r0, 16(r1)
-; SOFT-NEXT: mtlr r0
-; SOFT-NEXT: blr
-entry:
- %0 = fptrunc fp128 %a to half
- ret half %0
-}
-
-define fp128 @ext(half %a) unnamed_addr {
-; P8-LABEL: ext:
-; P8: # %bb.0: # %entry
-; P8-NEXT: mflr r0
-; P8-NEXT: stdu r1, -32(r1)
-; P8-NEXT: std r0, 48(r1)
-; P8-NEXT: .cfi_def_cfa_offset 32
-; P8-NEXT: .cfi_offset lr, 16
-; P8-NEXT: bl __extendsfkf2
-; P8-NEXT: nop
-; P8-NEXT: addi r1, r1, 32
-; P8-NEXT: ld r0, 16(r1)
-; P8-NEXT: mtlr r0
-; P8-NEXT: blr
-;
-; CHECK-LABEL: ext:
-; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: xscpsgndp vs34, f1, f1
-; CHECK-NEXT: xscvdpqp v2, v2
-; CHECK-NEXT: blr
-;
-; SOFT-LABEL: ext:
-; SOFT: # %bb.0: # %entry
-; SOFT-NEXT: mflr r0
-; SOFT-NEXT: stdu r1, -32(r1)
-; SOFT-NEXT: std r0, 48(r1)
-; SOFT-NEXT: .cfi_def_cfa_offset 32
-; SOFT-NEXT: .cfi_offset lr, 16
-; SOFT-NEXT: clrldi r3, r3, 48
-; SOFT-NEXT: bl __gnu_h2f_ieee
-; SOFT-NEXT: nop
-; SOFT-NEXT: bl __extendsfkf2
-; SOFT-NEXT: nop
-; SOFT-NEXT: addi r1, r1, 32
-; SOFT-NEXT: ld r0, 16(r1)
-; SOFT-NEXT: mtlr r0
-; SOFT-NEXT: blr
-entry:
- %0 = fpext half %a to fp128
- ret fp128 %0
-}
diff --git a/llvm/test/CodeGen/PowerPC/fp128-libcalls.ll b/llvm/test/CodeGen/PowerPC/fp128-libcalls.ll
index 9d875c854e320..29b4792787070 100644
--- a/llvm/test/CodeGen/PowerPC/fp128-libcalls.ll
+++ b/llvm/test/CodeGen/PowerPC/fp128-libcalls.ll
@@ -30,6 +30,15 @@ define fp128 @divkf3(fp128 %a, fp128 %b) {
ret fp128 %1
}
+
+define fp128 @extendsfkf2_f16(half %a) {
+; CHECK-LABEL: extendsfkf2_f16:
+; CHECK: __extendsfkf2
+entry:
+ %0 = fpext half %a to fp128
+ ret fp128 %0
+}
+
define fp128 @extendsfkf2(float %a) {
; CHECK-LABEL: extendsfkf2:
; CHECK: __extendsfkf2
@@ -44,6 +53,14 @@ define fp128 @extenddfkf2(double %a) {
ret fp128 %1
}
+define half @trunctfhf2(fp128 %a) {
+; CHECK-LABEL: trunctfhf2:
+; CHECK: __trunctfhf2
+entry:
+ %0 = fptrunc fp128 %a to half
+ ret half %0
+}
+
define float @trunckfsf2(fp128 %a) {
; CHECK-LABEL: trunckfsf2:
; CHECK: __trunckfsf2
>From 0754dc747afa77a598ab52ba5d4a0a5760d5ff9f Mon Sep 17 00:00:00 2001
From: Lei Huang <lei at ca.ibm.com>
Date: Thu, 6 Mar 2025 13:07:02 -0500
Subject: [PATCH 4/7] udpate tc
---
llvm/test/CodeGen/PowerPC/f128-conv.ll | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/llvm/test/CodeGen/PowerPC/f128-conv.ll b/llvm/test/CodeGen/PowerPC/f128-conv.ll
index 81045a4291a00..535c81badbaf1 100644
--- a/llvm/test/CodeGen/PowerPC/f128-conv.ll
+++ b/llvm/test/CodeGen/PowerPC/f128-conv.ll
@@ -1478,7 +1478,7 @@ define half @trunc(fp128 %a) unnamed_addr {
; CHECK-P8-NEXT: bl __trunctfhf2
; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: clrldi r3, r3, 48
-; CHECK-P8-NEXT: bl __gnu_h2f_ieee
+; CHECK-P8-NEXT: bl __extendhfsf2
; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: addi r1, r1, 32
; CHECK-P8-NEXT: ld r0, 16(r1)
>From c4cb2ac69d0af6a8ff0a669a636dc1b504eb0437 Mon Sep 17 00:00:00 2001
From: Lei Huang <lei at ca.ibm.com>
Date: Thu, 6 Mar 2025 13:19:47 -0500
Subject: [PATCH 5/7] remove unnamed instructions and ref to unnamed_addr as
per Chen's review comment
---
llvm/test/CodeGen/PowerPC/f128-conv.ll | 150 ++++++++++----------
llvm/test/CodeGen/PowerPC/fp128-libcalls.ll | 8 +-
2 files changed, 79 insertions(+), 79 deletions(-)
diff --git a/llvm/test/CodeGen/PowerPC/f128-conv.ll b/llvm/test/CodeGen/PowerPC/f128-conv.ll
index 535c81badbaf1..e277fb952a2aa 100644
--- a/llvm/test/CodeGen/PowerPC/f128-conv.ll
+++ b/llvm/test/CodeGen/PowerPC/f128-conv.ll
@@ -10,8 +10,8 @@
@umem = global [5 x i64] [i64 560, i64 100, i64 34, i64 2, i64 5], align 8
@swMem = global [5 x i32] [i32 5, i32 2, i32 3, i32 4, i32 0], align 4
@uwMem = global [5 x i32] [i32 5, i32 2, i32 3, i32 4, i32 0], align 4
- at uhwMem = local_unnamed_addr global [5 x i16] [i16 5, i16 2, i16 3, i16 4, i16 0], align 2
- at ubMem = local_unnamed_addr global [5 x i8] c"\05\02\03\04\00", align 1
+ at uhwMem = global [5 x i16] [i16 5, i16 2, i16 3, i16 4, i16 0], align 2
+ at ubMem = global [5 x i8] c"\05\02\03\04\00", align 1
; Function Attrs: norecurse nounwind
define void @sdwConv2qp(ptr nocapture %a, i64 %b) {
@@ -134,9 +134,9 @@ define void @sdwConv2qp_02(ptr nocapture %a) {
; CHECK-P8-NEXT: mtlr r0
; CHECK-P8-NEXT: blr
entry:
- %0 = load i64, ptr getelementptr inbounds
+ %i = load i64, ptr getelementptr inbounds
([5 x i64], ptr @mem, i64 0, i64 2), align 8
- %conv = sitofp i64 %0 to fp128
+ %conv = sitofp i64 %i to fp128
store fp128 %conv, ptr %a, align 16
ret void
@@ -172,8 +172,8 @@ define void @sdwConv2qp_03(ptr nocapture %a, ptr nocapture readonly %b) {
; CHECK-P8-NEXT: mtlr r0
; CHECK-P8-NEXT: blr
entry:
- %0 = load i64, ptr %b, align 8
- %conv = sitofp i64 %0 to fp128
+ %i = load i64, ptr %b, align 8
+ %conv = sitofp i64 %i to fp128
store fp128 %conv, ptr %a, align 16
ret void
@@ -343,9 +343,9 @@ define void @udwConv2qp_02(ptr nocapture %a) {
; CHECK-P8-NEXT: mtlr r0
; CHECK-P8-NEXT: blr
entry:
- %0 = load i64, ptr getelementptr inbounds
+ %i = load i64, ptr getelementptr inbounds
([5 x i64], ptr @umem, i64 0, i64 4), align 8
- %conv = uitofp i64 %0 to fp128
+ %conv = uitofp i64 %i to fp128
store fp128 %conv, ptr %a, align 16
ret void
@@ -381,8 +381,8 @@ define void @udwConv2qp_03(ptr nocapture %a, ptr nocapture readonly %b) {
; CHECK-P8-NEXT: mtlr r0
; CHECK-P8-NEXT: blr
entry:
- %0 = load i64, ptr %b, align 8
- %conv = uitofp i64 %0 to fp128
+ %i = load i64, ptr %b, align 8
+ %conv = uitofp i64 %i to fp128
store fp128 %conv, ptr %a, align 16
ret void
@@ -462,8 +462,8 @@ define ptr @sdwConv2qp_testXForm(ptr returned %sink,
ptr nocapture readonly %a) {
entry:
%add.ptr = getelementptr inbounds i8, ptr %a, i64 73333
- %0 = load i64, ptr %add.ptr, align 8
- %conv = sitofp i64 %0 to fp128
+ %i = load i64, ptr %add.ptr, align 8
+ %conv = sitofp i64 %i to fp128
store fp128 %conv, ptr %sink, align 16
ret ptr %sink
@@ -506,8 +506,8 @@ define ptr @udwConv2qp_testXForm(ptr returned %sink,
ptr nocapture readonly %a) {
entry:
%add.ptr = getelementptr inbounds i8, ptr %a, i64 73333
- %0 = load i64, ptr %add.ptr, align 8
- %conv = uitofp i64 %0 to fp128
+ %i = load i64, ptr %add.ptr, align 8
+ %conv = uitofp i64 %i to fp128
store fp128 %conv, ptr %sink, align 16
ret ptr %sink
@@ -579,8 +579,8 @@ define void @swConv2qp_02(ptr nocapture %a, ptr nocapture readonly %b) {
; CHECK-P8-NEXT: mtlr r0
; CHECK-P8-NEXT: blr
entry:
- %0 = load i32, ptr %b, align 4
- %conv = sitofp i32 %0 to fp128
+ %i = load i32, ptr %b, align 4
+ %conv = sitofp i32 %i to fp128
store fp128 %conv, ptr %a, align 16
ret void
@@ -621,9 +621,9 @@ define void @swConv2qp_03(ptr nocapture %a) {
; CHECK-P8-NEXT: mtlr r0
; CHECK-P8-NEXT: blr
entry:
- %0 = load i32, ptr getelementptr inbounds
+ %i = load i32, ptr getelementptr inbounds
([5 x i32], ptr @swMem, i64 0, i64 3), align 4
- %conv = sitofp i32 %0 to fp128
+ %conv = sitofp i32 %i to fp128
store fp128 %conv, ptr %a, align 16
ret void
@@ -695,8 +695,8 @@ define void @uwConv2qp_02(ptr nocapture %a, ptr nocapture readonly %b) {
; CHECK-P8-NEXT: mtlr r0
; CHECK-P8-NEXT: blr
entry:
- %0 = load i32, ptr %b, align 4
- %conv = uitofp i32 %0 to fp128
+ %i = load i32, ptr %b, align 4
+ %conv = uitofp i32 %i to fp128
store fp128 %conv, ptr %a, align 16
ret void
@@ -737,9 +737,9 @@ define void @uwConv2qp_03(ptr nocapture %a) {
; CHECK-P8-NEXT: mtlr r0
; CHECK-P8-NEXT: blr
entry:
- %0 = load i32, ptr getelementptr inbounds
+ %i = load i32, ptr getelementptr inbounds
([5 x i32], ptr @uwMem, i64 0, i64 3), align 4
- %conv = uitofp i32 %0 to fp128
+ %conv = uitofp i32 %i to fp128
store fp128 %conv, ptr %a, align 16
ret void
@@ -780,8 +780,8 @@ define void @uwConv2qp_04(ptr nocapture %a,
; CHECK-P8-NEXT: blr
i32 zeroext %b, ptr nocapture readonly %c) {
entry:
- %0 = load i32, ptr %c, align 4
- %add = add i32 %0, %b
+ %i = load i32, ptr %c, align 4
+ %add = add i32 %i, %b
%conv = uitofp i32 %add to fp128
store fp128 %conv, ptr %a, align 16
ret void
@@ -855,8 +855,8 @@ define void @uhwConv2qp_02(ptr nocapture %a, ptr nocapture readonly %b) {
; CHECK-P8-NEXT: mtlr r0
; CHECK-P8-NEXT: blr
entry:
- %0 = load i16, ptr %b, align 2
- %conv = uitofp i16 %0 to fp128
+ %i = load i16, ptr %b, align 2
+ %conv = uitofp i16 %i to fp128
store fp128 %conv, ptr %a, align 16
ret void
@@ -897,9 +897,9 @@ define void @uhwConv2qp_03(ptr nocapture %a) {
; CHECK-P8-NEXT: mtlr r0
; CHECK-P8-NEXT: blr
entry:
- %0 = load i16, ptr getelementptr inbounds
+ %i = load i16, ptr getelementptr inbounds
([5 x i16], ptr @uhwMem, i64 0, i64 3), align 2
- %conv = uitofp i16 %0 to fp128
+ %conv = uitofp i16 %i to fp128
store fp128 %conv, ptr %a, align 16
ret void
@@ -941,8 +941,8 @@ define void @uhwConv2qp_04(ptr nocapture %a, i16 zeroext %b,
ptr nocapture readonly %c) {
entry:
%conv = zext i16 %b to i32
- %0 = load i16, ptr %c, align 2
- %conv1 = zext i16 %0 to i32
+ %i = load i16, ptr %c, align 2
+ %conv1 = zext i16 %i to i32
%add = add nuw nsw i32 %conv1, %conv
%conv2 = sitofp i32 %add to fp128
store fp128 %conv2, ptr %a, align 16
@@ -1016,8 +1016,8 @@ define void @ubConv2qp_02(ptr nocapture %a, ptr nocapture readonly %b) {
; CHECK-P8-NEXT: mtlr r0
; CHECK-P8-NEXT: blr
entry:
- %0 = load i8, ptr %b, align 1
- %conv = uitofp i8 %0 to fp128
+ %i = load i8, ptr %b, align 1
+ %conv = uitofp i8 %i to fp128
store fp128 %conv, ptr %a, align 16
ret void
@@ -1058,9 +1058,9 @@ define void @ubConv2qp_03(ptr nocapture %a) {
; CHECK-P8-NEXT: mtlr r0
; CHECK-P8-NEXT: blr
entry:
- %0 = load i8, ptr getelementptr inbounds
+ %i = load i8, ptr getelementptr inbounds
([5 x i8], ptr @ubMem, i64 0, i64 2), align 1
- %conv = uitofp i8 %0 to fp128
+ %conv = uitofp i8 %i to fp128
store fp128 %conv, ptr %a, align 16
ret void
@@ -1068,6 +1068,7 @@ entry:
; Function Attrs: norecurse nounwind
define void @ubConv2qp_04(ptr nocapture %a, i8 zeroext %b,
+ ptr nocapture readonly %c) {
; CHECK-LABEL: ubConv2qp_04:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lbz r5, 0(r5)
@@ -1099,11 +1100,10 @@ define void @ubConv2qp_04(ptr nocapture %a, i8 zeroext %b,
; CHECK-P8-NEXT: ld r30, -16(r1) # 8-byte Folded Reload
; CHECK-P8-NEXT: mtlr r0
; CHECK-P8-NEXT: blr
- ptr nocapture readonly %c) {
entry:
%conv = zext i8 %b to i32
- %0 = load i8, ptr %c, align 1
- %conv1 = zext i8 %0 to i32
+ %i = load i8, ptr %c, align 1
+ %conv1 = zext i8 %i to i32
%add = add nuw nsw i32 %conv1, %conv
%conv2 = sitofp i32 %add to fp128
store fp128 %conv2, ptr %a, align 16
@@ -1145,8 +1145,8 @@ define double @qpConv2dp(ptr nocapture readonly %a) {
; CHECK-P8-NEXT: mtlr r0
; CHECK-P8-NEXT: blr
entry:
- %0 = load fp128, ptr %a, align 16
- %conv = fptrunc fp128 %0 to double
+ %i = load fp128, ptr %a, align 16
+ %conv = fptrunc fp128 %i to double
ret double %conv
}
@@ -1184,8 +1184,8 @@ define void @qpConv2dp_02(ptr nocapture %res) {
; CHECK-P8-NEXT: mtlr r0
; CHECK-P8-NEXT: blr
entry:
- %0 = load fp128, ptr @f128global, align 16
- %conv = fptrunc fp128 %0 to double
+ %i = load fp128, ptr @f128global, align 16
+ %conv = fptrunc fp128 %i to double
store double %conv, ptr %res, align 8
ret void
}
@@ -1230,8 +1230,8 @@ define void @qpConv2dp_03(ptr nocapture %res, i32 signext %idx) {
; CHECK-P8-NEXT: mtlr r0
; CHECK-P8-NEXT: blr
entry:
- %0 = load fp128, ptr @f128Array, align 16
- %conv = fptrunc fp128 %0 to double
+ %i = load fp128, ptr @f128Array, align 16
+ %conv = fptrunc fp128 %i to double
%idxprom = sext i32 %idx to i64
%arrayidx = getelementptr inbounds double, ptr %res, i64 %idxprom
store double %conv, ptr %arrayidx, align 8
@@ -1274,9 +1274,9 @@ define void @qpConv2dp_04(ptr nocapture readonly %a, ptr nocapture readonly %b,
; CHECK-P8-NEXT: mtlr r0
; CHECK-P8-NEXT: blr
entry:
- %0 = load fp128, ptr %a, align 16
+ %i = load fp128, ptr %a, align 16
%1 = load fp128, ptr %b, align 16
- %add = fadd fp128 %0, %1
+ %add = fadd fp128 %i, %1
%conv = fptrunc fp128 %add to double
store double %conv, ptr %res, align 8
ret void
@@ -1309,8 +1309,8 @@ define float @qpConv2sp(ptr nocapture readonly %a) {
; CHECK-P8-NEXT: mtlr r0
; CHECK-P8-NEXT: blr
entry:
- %0 = load fp128, ptr %a, align 16
- %conv = fptrunc fp128 %0 to float
+ %i = load fp128, ptr %a, align 16
+ %conv = fptrunc fp128 %i to float
ret float %conv
}
@@ -1349,8 +1349,8 @@ define void @qpConv2sp_02(ptr nocapture %res) {
; CHECK-P8-NEXT: mtlr r0
; CHECK-P8-NEXT: blr
entry:
- %0 = load fp128, ptr @f128global, align 16
- %conv = fptrunc fp128 %0 to float
+ %i = load fp128, ptr @f128global, align 16
+ %conv = fptrunc fp128 %i to float
store float %conv, ptr %res, align 4
ret void
}
@@ -1397,8 +1397,8 @@ define void @qpConv2sp_03(ptr nocapture %res, i32 signext %idx) {
; CHECK-P8-NEXT: mtlr r0
; CHECK-P8-NEXT: blr
entry:
- %0 = load fp128, ptr getelementptr inbounds ([4 x fp128], ptr @f128Array, i64 0, i64 3), align 16
- %conv = fptrunc fp128 %0 to float
+ %i = load fp128, ptr getelementptr inbounds ([4 x fp128], ptr @f128Array, i64 0, i64 3), align 16
+ %conv = fptrunc fp128 %i to float
%idxprom = sext i32 %idx to i64
%arrayidx = getelementptr inbounds float, ptr %res, i64 %idxprom
store float %conv, ptr %arrayidx, align 4
@@ -1442,15 +1442,15 @@ define void @qpConv2sp_04(ptr nocapture readonly %a, ptr nocapture readonly %b,
; CHECK-P8-NEXT: mtlr r0
; CHECK-P8-NEXT: blr
entry:
- %0 = load fp128, ptr %a, align 16
+ %i = load fp128, ptr %a, align 16
%1 = load fp128, ptr %b, align 16
- %add = fadd fp128 %0, %1
+ %add = fadd fp128 %i, %1
%conv = fptrunc fp128 %add to float
store float %conv, ptr %res, align 4
ret void
}
-define half @trunc(fp128 %a) unnamed_addr {
+define half @trunc(fp128 %a) {
; CHECK-LABEL: trunc:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: mflr r0
@@ -1485,11 +1485,11 @@ define half @trunc(fp128 %a) unnamed_addr {
; CHECK-P8-NEXT: mtlr r0
; CHECK-P8-NEXT: blr
entry:
- %0 = fptrunc fp128 %a to half
- ret half %0
+ %i = fptrunc fp128 %a to half
+ ret half %i
}
-define fp128 @ext(half %a) unnamed_addr {
+define fp128 @ext(half %a) {
; CHECK-LABEL: ext:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xscpsgndp v2, f1, f1
@@ -1510,8 +1510,8 @@ define fp128 @ext(half %a) unnamed_addr {
; CHECK-P8-NEXT: mtlr r0
; CHECK-P8-NEXT: blr
entry:
- %0 = fpext half %a to fp128
- ret fp128 %0
+ %i = fpext half %a to fp128
+ ret fp128 %i
}
@f128Glob = common global fp128 0xL00000000000000000000000000000000, align 16
@@ -1572,8 +1572,8 @@ define void @dpConv2qp_02(ptr nocapture readonly %a) {
; CHECK-P8-NEXT: mtlr r0
; CHECK-P8-NEXT: blr
entry:
- %0 = load double, ptr %a, align 8
- %conv = fpext double %0 to fp128
+ %i = load double, ptr %a, align 8
+ %conv = fpext double %i to fp128
store fp128 %conv, ptr @f128Glob, align 16
ret void
}
@@ -1612,8 +1612,8 @@ define void @dpConv2qp_02b(ptr nocapture readonly %a, i32 signext %idx) {
entry:
%idxprom = sext i32 %idx to i64
%arrayidx = getelementptr inbounds double, ptr %a, i64 %idxprom
- %0 = load double, ptr %arrayidx, align 8
- %conv = fpext double %0 to fp128
+ %i = load double, ptr %arrayidx, align 8
+ %conv = fpext double %i to fp128
store fp128 %conv, ptr @f128Glob, align 16
ret void
}
@@ -1750,8 +1750,8 @@ define void @spConv2qp_02(ptr nocapture readonly %a) {
; CHECK-P8-NEXT: mtlr r0
; CHECK-P8-NEXT: blr
entry:
- %0 = load float, ptr %a, align 4
- %conv = fpext float %0 to fp128
+ %i = load float, ptr %a, align 4
+ %conv = fpext float %i to fp128
store fp128 %conv, ptr @f128Glob, align 16
ret void
}
@@ -1790,8 +1790,8 @@ define void @spConv2qp_02b(ptr nocapture readonly %a, i32 signext %idx) {
entry:
%idxprom = sext i32 %idx to i64
%arrayidx = getelementptr inbounds float, ptr %a, i64 %idxprom
- %0 = load float, ptr %arrayidx, align 4
- %conv = fpext float %0 to fp128
+ %i = load float, ptr %arrayidx, align 4
+ %conv = fpext float %i to fp128
store fp128 %conv, ptr @f128Glob, align 16
ret void
}
@@ -2208,8 +2208,8 @@ define i128 @qpConv2i128(ptr nocapture readonly %a) {
; CHECK-P8-NEXT: mtlr r0
; CHECK-P8-NEXT: blr
entry:
- %0 = load fp128, ptr %a, align 16
- %conv = fptosi fp128 %0 to i128
+ %i = load fp128, ptr %a, align 16
+ %conv = fptosi fp128 %i to i128
ret i128 %conv
}
@@ -2246,8 +2246,8 @@ define i128 @qpConv2ui128(ptr nocapture readonly %a) {
; CHECK-P8-NEXT: mtlr r0
; CHECK-P8-NEXT: blr
entry:
- %0 = load fp128, ptr %a, align 16
- %conv = fptoui fp128 %0 to i128
+ %i = load fp128, ptr %a, align 16
+ %conv = fptoui fp128 %i to i128
ret i128 %conv
}
@@ -2276,8 +2276,8 @@ define i1 @qpConv2ui1(ptr nocapture readonly %a) {
; CHECK-P8-NEXT: mtlr r0
; CHECK-P8-NEXT: blr
entry:
- %0 = load fp128, ptr %a, align 16
- %conv = fptoui fp128 %0 to i1
+ %i = load fp128, ptr %a, align 16
+ %conv = fptoui fp128 %i to i1
ret i1 %conv
}
@@ -2306,7 +2306,7 @@ define i1 @qpConv2si1(ptr nocapture readonly %a) {
; CHECK-P8-NEXT: mtlr r0
; CHECK-P8-NEXT: blr
entry:
- %0 = load fp128, ptr %a, align 16
- %conv = fptosi fp128 %0 to i1
+ %i = load fp128, ptr %a, align 16
+ %conv = fptosi fp128 %i to i1
ret i1 %conv
}
diff --git a/llvm/test/CodeGen/PowerPC/fp128-libcalls.ll b/llvm/test/CodeGen/PowerPC/fp128-libcalls.ll
index 29b4792787070..5b8bdb17b1200 100644
--- a/llvm/test/CodeGen/PowerPC/fp128-libcalls.ll
+++ b/llvm/test/CodeGen/PowerPC/fp128-libcalls.ll
@@ -35,8 +35,8 @@ define fp128 @extendsfkf2_f16(half %a) {
; CHECK-LABEL: extendsfkf2_f16:
; CHECK: __extendsfkf2
entry:
- %0 = fpext half %a to fp128
- ret fp128 %0
+ %i = fpext half %a to fp128
+ ret fp128 %i
}
define fp128 @extendsfkf2(float %a) {
@@ -57,8 +57,8 @@ define half @trunctfhf2(fp128 %a) {
; CHECK-LABEL: trunctfhf2:
; CHECK: __trunctfhf2
entry:
- %0 = fptrunc fp128 %a to half
- ret half %0
+ %i = fptrunc fp128 %a to half
+ ret half %i
}
define float @trunckfsf2(fp128 %a) {
>From 45791d62358b9dfcd9f1036809f39dc6478fd7bc Mon Sep 17 00:00:00 2001
From: Lei Huang <lei at ca.ibm.com>
Date: Thu, 6 Mar 2025 13:27:28 -0500
Subject: [PATCH 6/7] add nounwind attribute to functions to avoid generating
cfi* instuctions
---
llvm/test/CodeGen/PowerPC/f128-conv.ll | 303 +++++--------------------
1 file changed, 63 insertions(+), 240 deletions(-)
diff --git a/llvm/test/CodeGen/PowerPC/f128-conv.ll b/llvm/test/CodeGen/PowerPC/f128-conv.ll
index e277fb952a2aa..3ecf00bd84ae4 100644
--- a/llvm/test/CodeGen/PowerPC/f128-conv.ll
+++ b/llvm/test/CodeGen/PowerPC/f128-conv.ll
@@ -14,7 +14,7 @@
@ubMem = global [5 x i8] c"\05\02\03\04\00", align 1
; Function Attrs: norecurse nounwind
-define void @sdwConv2qp(ptr nocapture %a, i64 %b) {
+define void @sdwConv2qp(ptr nocapture %a, i64 %b) nounwind {
; CHECK-LABEL: sdwConv2qp:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: mtvsrd v2, r4
@@ -25,9 +25,6 @@ define void @sdwConv2qp(ptr nocapture %a, i64 %b) {
; CHECK-P8-LABEL: sdwConv2qp:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: mflr r0
-; CHECK-P8-NEXT: .cfi_def_cfa_offset 48
-; CHECK-P8-NEXT: .cfi_offset lr, 16
-; CHECK-P8-NEXT: .cfi_offset r30, -16
; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: stdu r1, -48(r1)
; CHECK-P8-NEXT: mr r30, r3
@@ -50,13 +47,10 @@ entry:
}
; Function Attrs: norecurse nounwind
-define void @sdwConv2qp_01(ptr nocapture %a, i128 %b) {
+define void @sdwConv2qp_01(ptr nocapture %a, i128 %b) nounwind {
; CHECK-LABEL: sdwConv2qp_01:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: mflr r0
-; CHECK-NEXT: .cfi_def_cfa_offset 48
-; CHECK-NEXT: .cfi_offset lr, 16
-; CHECK-NEXT: .cfi_offset r30, -16
; CHECK-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-NEXT: stdu r1, -48(r1)
; CHECK-NEXT: mr r30, r3
@@ -75,9 +69,6 @@ define void @sdwConv2qp_01(ptr nocapture %a, i128 %b) {
; CHECK-P8-LABEL: sdwConv2qp_01:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: mflr r0
-; CHECK-P8-NEXT: .cfi_def_cfa_offset 48
-; CHECK-P8-NEXT: .cfi_offset lr, 16
-; CHECK-P8-NEXT: .cfi_offset r30, -16
; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: stdu r1, -48(r1)
; CHECK-P8-NEXT: mr r30, r3
@@ -101,7 +92,7 @@ entry:
}
; Function Attrs: norecurse nounwind
-define void @sdwConv2qp_02(ptr nocapture %a) {
+define void @sdwConv2qp_02(ptr nocapture %a) nounwind {
; CHECK-LABEL: sdwConv2qp_02:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: addis r4, r2, .LC0 at toc@ha
@@ -114,9 +105,6 @@ define void @sdwConv2qp_02(ptr nocapture %a) {
; CHECK-P8-LABEL: sdwConv2qp_02:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: mflr r0
-; CHECK-P8-NEXT: .cfi_def_cfa_offset 48
-; CHECK-P8-NEXT: .cfi_offset lr, 16
-; CHECK-P8-NEXT: .cfi_offset r30, -16
; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: stdu r1, -48(r1)
; CHECK-P8-NEXT: mr r30, r3
@@ -143,7 +131,7 @@ entry:
}
; Function Attrs: norecurse nounwind
-define void @sdwConv2qp_03(ptr nocapture %a, ptr nocapture readonly %b) {
+define void @sdwConv2qp_03(ptr nocapture %a, ptr nocapture readonly %b) nounwind {
; CHECK-LABEL: sdwConv2qp_03:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lxsd v2, 0(r4)
@@ -154,9 +142,6 @@ define void @sdwConv2qp_03(ptr nocapture %a, ptr nocapture readonly %b) {
; CHECK-P8-LABEL: sdwConv2qp_03:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: mflr r0
-; CHECK-P8-NEXT: .cfi_def_cfa_offset 48
-; CHECK-P8-NEXT: .cfi_offset lr, 16
-; CHECK-P8-NEXT: .cfi_offset r30, -16
; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: stdu r1, -48(r1)
; CHECK-P8-NEXT: std r0, 64(r1)
@@ -180,7 +165,7 @@ entry:
}
; Function Attrs: norecurse nounwind
-define void @sdwConv2qp_04(ptr nocapture %a, i1 %b) {
+define void @sdwConv2qp_04(ptr nocapture %a, i1 %b) nounwind {
; CHECK-LABEL: sdwConv2qp_04:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: andi. r4, r4, 1
@@ -195,9 +180,6 @@ define void @sdwConv2qp_04(ptr nocapture %a, i1 %b) {
; CHECK-P8-LABEL: sdwConv2qp_04:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: mflr r0
-; CHECK-P8-NEXT: .cfi_def_cfa_offset 48
-; CHECK-P8-NEXT: .cfi_offset lr, 16
-; CHECK-P8-NEXT: .cfi_offset r30, -16
; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: stdu r1, -48(r1)
; CHECK-P8-NEXT: mr r30, r3
@@ -223,7 +205,7 @@ entry:
}
; Function Attrs: norecurse nounwind
-define void @udwConv2qp(ptr nocapture %a, i64 %b) {
+define void @udwConv2qp(ptr nocapture %a, i64 %b) nounwind {
; CHECK-LABEL: udwConv2qp:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: mtvsrd v2, r4
@@ -234,9 +216,6 @@ define void @udwConv2qp(ptr nocapture %a, i64 %b) {
; CHECK-P8-LABEL: udwConv2qp:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: mflr r0
-; CHECK-P8-NEXT: .cfi_def_cfa_offset 48
-; CHECK-P8-NEXT: .cfi_offset lr, 16
-; CHECK-P8-NEXT: .cfi_offset r30, -16
; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: stdu r1, -48(r1)
; CHECK-P8-NEXT: mr r30, r3
@@ -259,13 +238,10 @@ entry:
}
; Function Attrs: norecurse nounwind
-define void @udwConv2qp_01(ptr nocapture %a, i128 %b) {
+define void @udwConv2qp_01(ptr nocapture %a, i128 %b) nounwind {
; CHECK-LABEL: udwConv2qp_01:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: mflr r0
-; CHECK-NEXT: .cfi_def_cfa_offset 48
-; CHECK-NEXT: .cfi_offset lr, 16
-; CHECK-NEXT: .cfi_offset r30, -16
; CHECK-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-NEXT: stdu r1, -48(r1)
; CHECK-NEXT: mr r30, r3
@@ -284,9 +260,6 @@ define void @udwConv2qp_01(ptr nocapture %a, i128 %b) {
; CHECK-P8-LABEL: udwConv2qp_01:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: mflr r0
-; CHECK-P8-NEXT: .cfi_def_cfa_offset 48
-; CHECK-P8-NEXT: .cfi_offset lr, 16
-; CHECK-P8-NEXT: .cfi_offset r30, -16
; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: stdu r1, -48(r1)
; CHECK-P8-NEXT: mr r30, r3
@@ -310,7 +283,7 @@ entry:
}
; Function Attrs: norecurse nounwind
-define void @udwConv2qp_02(ptr nocapture %a) {
+define void @udwConv2qp_02(ptr nocapture %a) nounwind {
; CHECK-LABEL: udwConv2qp_02:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: addis r4, r2, .LC1 at toc@ha
@@ -323,9 +296,6 @@ define void @udwConv2qp_02(ptr nocapture %a) {
; CHECK-P8-LABEL: udwConv2qp_02:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: mflr r0
-; CHECK-P8-NEXT: .cfi_def_cfa_offset 48
-; CHECK-P8-NEXT: .cfi_offset lr, 16
-; CHECK-P8-NEXT: .cfi_offset r30, -16
; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: stdu r1, -48(r1)
; CHECK-P8-NEXT: mr r30, r3
@@ -352,7 +322,7 @@ entry:
}
; Function Attrs: norecurse nounwind
-define void @udwConv2qp_03(ptr nocapture %a, ptr nocapture readonly %b) {
+define void @udwConv2qp_03(ptr nocapture %a, ptr nocapture readonly %b) nounwind {
; CHECK-LABEL: udwConv2qp_03:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lxsd v2, 0(r4)
@@ -363,9 +333,6 @@ define void @udwConv2qp_03(ptr nocapture %a, ptr nocapture readonly %b) {
; CHECK-P8-LABEL: udwConv2qp_03:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: mflr r0
-; CHECK-P8-NEXT: .cfi_def_cfa_offset 48
-; CHECK-P8-NEXT: .cfi_offset lr, 16
-; CHECK-P8-NEXT: .cfi_offset r30, -16
; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: stdu r1, -48(r1)
; CHECK-P8-NEXT: std r0, 64(r1)
@@ -389,7 +356,7 @@ entry:
}
; Function Attrs: norecurse nounwind
-define void @udwConv2qp_04(ptr nocapture %a, i1 %b) {
+define void @udwConv2qp_04(ptr nocapture %a, i1 %b) nounwind {
; CHECK-LABEL: udwConv2qp_04:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: clrlwi r4, r4, 31
@@ -401,9 +368,6 @@ define void @udwConv2qp_04(ptr nocapture %a, i1 %b) {
; CHECK-P8-LABEL: udwConv2qp_04:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: mflr r0
-; CHECK-P8-NEXT: .cfi_def_cfa_offset 48
-; CHECK-P8-NEXT: .cfi_offset lr, 16
-; CHECK-P8-NEXT: .cfi_offset r30, -16
; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: stdu r1, -48(r1)
; CHECK-P8-NEXT: mr r30, r3
@@ -439,9 +403,6 @@ define ptr @sdwConv2qp_testXForm(ptr returned %sink,
; CHECK-P8-LABEL: sdwConv2qp_testXForm:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: mflr r0
-; CHECK-P8-NEXT: .cfi_def_cfa_offset 48
-; CHECK-P8-NEXT: .cfi_offset lr, 16
-; CHECK-P8-NEXT: .cfi_offset r30, -16
; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: stdu r1, -48(r1)
; CHECK-P8-NEXT: mr r30, r3
@@ -459,7 +420,7 @@ define ptr @sdwConv2qp_testXForm(ptr returned %sink,
; CHECK-P8-NEXT: ld r30, -16(r1) # 8-byte Folded Reload
; CHECK-P8-NEXT: mtlr r0
; CHECK-P8-NEXT: blr
- ptr nocapture readonly %a) {
+ ptr nocapture readonly %a) nounwind {
entry:
%add.ptr = getelementptr inbounds i8, ptr %a, i64 73333
%i = load i64, ptr %add.ptr, align 8
@@ -483,9 +444,6 @@ define ptr @udwConv2qp_testXForm(ptr returned %sink,
; CHECK-P8-LABEL: udwConv2qp_testXForm:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: mflr r0
-; CHECK-P8-NEXT: .cfi_def_cfa_offset 48
-; CHECK-P8-NEXT: .cfi_offset lr, 16
-; CHECK-P8-NEXT: .cfi_offset r30, -16
; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: stdu r1, -48(r1)
; CHECK-P8-NEXT: mr r30, r3
@@ -503,7 +461,7 @@ define ptr @udwConv2qp_testXForm(ptr returned %sink,
; CHECK-P8-NEXT: ld r30, -16(r1) # 8-byte Folded Reload
; CHECK-P8-NEXT: mtlr r0
; CHECK-P8-NEXT: blr
- ptr nocapture readonly %a) {
+ ptr nocapture readonly %a) nounwind {
entry:
%add.ptr = getelementptr inbounds i8, ptr %a, i64 73333
%i = load i64, ptr %add.ptr, align 8
@@ -514,7 +472,7 @@ entry:
}
; Function Attrs: norecurse nounwind
-define void @swConv2qp(ptr nocapture %a, i32 signext %b) {
+define void @swConv2qp(ptr nocapture %a, i32 signext %b) nounwind {
; CHECK-LABEL: swConv2qp:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: mtvsrwa v2, r4
@@ -525,9 +483,6 @@ define void @swConv2qp(ptr nocapture %a, i32 signext %b) {
; CHECK-P8-LABEL: swConv2qp:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: mflr r0
-; CHECK-P8-NEXT: .cfi_def_cfa_offset 48
-; CHECK-P8-NEXT: .cfi_offset lr, 16
-; CHECK-P8-NEXT: .cfi_offset r30, -16
; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: stdu r1, -48(r1)
; CHECK-P8-NEXT: mr r30, r3
@@ -550,7 +505,7 @@ entry:
}
; Function Attrs: norecurse nounwind
-define void @swConv2qp_02(ptr nocapture %a, ptr nocapture readonly %b) {
+define void @swConv2qp_02(ptr nocapture %a, ptr nocapture readonly %b) nounwind {
; CHECK-LABEL: swConv2qp_02:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lxsiwax v2, 0, r4
@@ -561,9 +516,6 @@ define void @swConv2qp_02(ptr nocapture %a, ptr nocapture readonly %b) {
; CHECK-P8-LABEL: swConv2qp_02:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: mflr r0
-; CHECK-P8-NEXT: .cfi_def_cfa_offset 48
-; CHECK-P8-NEXT: .cfi_offset lr, 16
-; CHECK-P8-NEXT: .cfi_offset r30, -16
; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: stdu r1, -48(r1)
; CHECK-P8-NEXT: std r0, 64(r1)
@@ -587,7 +539,7 @@ entry:
}
; Function Attrs: norecurse nounwind
-define void @swConv2qp_03(ptr nocapture %a) {
+define void @swConv2qp_03(ptr nocapture %a) nounwind {
; CHECK-LABEL: swConv2qp_03:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: addis r4, r2, .LC2 at toc@ha
@@ -601,9 +553,6 @@ define void @swConv2qp_03(ptr nocapture %a) {
; CHECK-P8-LABEL: swConv2qp_03:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: mflr r0
-; CHECK-P8-NEXT: .cfi_def_cfa_offset 48
-; CHECK-P8-NEXT: .cfi_offset lr, 16
-; CHECK-P8-NEXT: .cfi_offset r30, -16
; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: stdu r1, -48(r1)
; CHECK-P8-NEXT: mr r30, r3
@@ -630,7 +579,7 @@ entry:
}
; Function Attrs: norecurse nounwind
-define void @uwConv2qp(ptr nocapture %a, i32 zeroext %b) {
+define void @uwConv2qp(ptr nocapture %a, i32 zeroext %b) nounwind {
; CHECK-LABEL: uwConv2qp:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: mtvsrwz v2, r4
@@ -641,9 +590,6 @@ define void @uwConv2qp(ptr nocapture %a, i32 zeroext %b) {
; CHECK-P8-LABEL: uwConv2qp:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: mflr r0
-; CHECK-P8-NEXT: .cfi_def_cfa_offset 48
-; CHECK-P8-NEXT: .cfi_offset lr, 16
-; CHECK-P8-NEXT: .cfi_offset r30, -16
; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: stdu r1, -48(r1)
; CHECK-P8-NEXT: mr r30, r3
@@ -666,7 +612,7 @@ entry:
}
; Function Attrs: norecurse nounwind
-define void @uwConv2qp_02(ptr nocapture %a, ptr nocapture readonly %b) {
+define void @uwConv2qp_02(ptr nocapture %a, ptr nocapture readonly %b) nounwind {
; CHECK-LABEL: uwConv2qp_02:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lxsiwzx v2, 0, r4
@@ -677,9 +623,6 @@ define void @uwConv2qp_02(ptr nocapture %a, ptr nocapture readonly %b) {
; CHECK-P8-LABEL: uwConv2qp_02:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: mflr r0
-; CHECK-P8-NEXT: .cfi_def_cfa_offset 48
-; CHECK-P8-NEXT: .cfi_offset lr, 16
-; CHECK-P8-NEXT: .cfi_offset r30, -16
; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: stdu r1, -48(r1)
; CHECK-P8-NEXT: std r0, 64(r1)
@@ -703,7 +646,7 @@ entry:
}
; Function Attrs: norecurse nounwind
-define void @uwConv2qp_03(ptr nocapture %a) {
+define void @uwConv2qp_03(ptr nocapture %a) nounwind {
; CHECK-LABEL: uwConv2qp_03:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: addis r4, r2, .LC3 at toc@ha
@@ -717,9 +660,6 @@ define void @uwConv2qp_03(ptr nocapture %a) {
; CHECK-P8-LABEL: uwConv2qp_03:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: mflr r0
-; CHECK-P8-NEXT: .cfi_def_cfa_offset 48
-; CHECK-P8-NEXT: .cfi_offset lr, 16
-; CHECK-P8-NEXT: .cfi_offset r30, -16
; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: stdu r1, -48(r1)
; CHECK-P8-NEXT: mr r30, r3
@@ -759,9 +699,6 @@ define void @uwConv2qp_04(ptr nocapture %a,
; CHECK-P8-LABEL: uwConv2qp_04:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: mflr r0
-; CHECK-P8-NEXT: .cfi_def_cfa_offset 48
-; CHECK-P8-NEXT: .cfi_offset lr, 16
-; CHECK-P8-NEXT: .cfi_offset r30, -16
; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: stdu r1, -48(r1)
; CHECK-P8-NEXT: std r0, 64(r1)
@@ -778,7 +715,7 @@ define void @uwConv2qp_04(ptr nocapture %a,
; CHECK-P8-NEXT: ld r30, -16(r1) # 8-byte Folded Reload
; CHECK-P8-NEXT: mtlr r0
; CHECK-P8-NEXT: blr
- i32 zeroext %b, ptr nocapture readonly %c) {
+ i32 zeroext %b, ptr nocapture readonly %c) nounwind {
entry:
%i = load i32, ptr %c, align 4
%add = add i32 %i, %b
@@ -789,7 +726,7 @@ entry:
}
; Function Attrs: norecurse nounwind
-define void @uhwConv2qp(ptr nocapture %a, i16 zeroext %b) {
+define void @uhwConv2qp(ptr nocapture %a, i16 zeroext %b) nounwind {
; CHECK-LABEL: uhwConv2qp:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: mtvsrwz v2, r4
@@ -800,9 +737,6 @@ define void @uhwConv2qp(ptr nocapture %a, i16 zeroext %b) {
; CHECK-P8-LABEL: uhwConv2qp:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: mflr r0
-; CHECK-P8-NEXT: .cfi_def_cfa_offset 48
-; CHECK-P8-NEXT: .cfi_offset lr, 16
-; CHECK-P8-NEXT: .cfi_offset r30, -16
; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: stdu r1, -48(r1)
; CHECK-P8-NEXT: mr r30, r3
@@ -826,7 +760,7 @@ entry:
}
; Function Attrs: norecurse nounwind
-define void @uhwConv2qp_02(ptr nocapture %a, ptr nocapture readonly %b) {
+define void @uhwConv2qp_02(ptr nocapture %a, ptr nocapture readonly %b) nounwind {
; CHECK-LABEL: uhwConv2qp_02:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lxsihzx v2, 0, r4
@@ -837,9 +771,6 @@ define void @uhwConv2qp_02(ptr nocapture %a, ptr nocapture readonly %b) {
; CHECK-P8-LABEL: uhwConv2qp_02:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: mflr r0
-; CHECK-P8-NEXT: .cfi_def_cfa_offset 48
-; CHECK-P8-NEXT: .cfi_offset lr, 16
-; CHECK-P8-NEXT: .cfi_offset r30, -16
; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: stdu r1, -48(r1)
; CHECK-P8-NEXT: std r0, 64(r1)
@@ -863,7 +794,7 @@ entry:
}
; Function Attrs: norecurse nounwind
-define void @uhwConv2qp_03(ptr nocapture %a) {
+define void @uhwConv2qp_03(ptr nocapture %a) nounwind {
; CHECK-LABEL: uhwConv2qp_03:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: addis r4, r2, .LC4 at toc@ha
@@ -877,9 +808,6 @@ define void @uhwConv2qp_03(ptr nocapture %a) {
; CHECK-P8-LABEL: uhwConv2qp_03:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: mflr r0
-; CHECK-P8-NEXT: .cfi_def_cfa_offset 48
-; CHECK-P8-NEXT: .cfi_offset lr, 16
-; CHECK-P8-NEXT: .cfi_offset r30, -16
; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: stdu r1, -48(r1)
; CHECK-P8-NEXT: mr r30, r3
@@ -919,9 +847,6 @@ define void @uhwConv2qp_04(ptr nocapture %a, i16 zeroext %b,
; CHECK-P8-LABEL: uhwConv2qp_04:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: mflr r0
-; CHECK-P8-NEXT: .cfi_def_cfa_offset 48
-; CHECK-P8-NEXT: .cfi_offset lr, 16
-; CHECK-P8-NEXT: .cfi_offset r30, -16
; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: stdu r1, -48(r1)
; CHECK-P8-NEXT: std r0, 64(r1)
@@ -938,7 +863,7 @@ define void @uhwConv2qp_04(ptr nocapture %a, i16 zeroext %b,
; CHECK-P8-NEXT: ld r30, -16(r1) # 8-byte Folded Reload
; CHECK-P8-NEXT: mtlr r0
; CHECK-P8-NEXT: blr
- ptr nocapture readonly %c) {
+ ptr nocapture readonly %c) nounwind {
entry:
%conv = zext i16 %b to i32
%i = load i16, ptr %c, align 2
@@ -951,7 +876,7 @@ entry:
}
; Function Attrs: norecurse nounwind
-define void @ubConv2qp(ptr nocapture %a, i8 zeroext %b) {
+define void @ubConv2qp(ptr nocapture %a, i8 zeroext %b) nounwind {
; CHECK-LABEL: ubConv2qp:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: mtvsrwz v2, r4
@@ -962,9 +887,6 @@ define void @ubConv2qp(ptr nocapture %a, i8 zeroext %b) {
; CHECK-P8-LABEL: ubConv2qp:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: mflr r0
-; CHECK-P8-NEXT: .cfi_def_cfa_offset 48
-; CHECK-P8-NEXT: .cfi_offset lr, 16
-; CHECK-P8-NEXT: .cfi_offset r30, -16
; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: stdu r1, -48(r1)
; CHECK-P8-NEXT: mr r30, r3
@@ -987,7 +909,7 @@ entry:
}
; Function Attrs: norecurse nounwind
-define void @ubConv2qp_02(ptr nocapture %a, ptr nocapture readonly %b) {
+define void @ubConv2qp_02(ptr nocapture %a, ptr nocapture readonly %b) nounwind {
; CHECK-LABEL: ubConv2qp_02:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lxsibzx v2, 0, r4
@@ -998,9 +920,6 @@ define void @ubConv2qp_02(ptr nocapture %a, ptr nocapture readonly %b) {
; CHECK-P8-LABEL: ubConv2qp_02:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: mflr r0
-; CHECK-P8-NEXT: .cfi_def_cfa_offset 48
-; CHECK-P8-NEXT: .cfi_offset lr, 16
-; CHECK-P8-NEXT: .cfi_offset r30, -16
; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: stdu r1, -48(r1)
; CHECK-P8-NEXT: std r0, 64(r1)
@@ -1024,7 +943,7 @@ entry:
}
; Function Attrs: norecurse nounwind
-define void @ubConv2qp_03(ptr nocapture %a) {
+define void @ubConv2qp_03(ptr nocapture %a) nounwind {
; CHECK-LABEL: ubConv2qp_03:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: addis r4, r2, .LC5 at toc@ha
@@ -1038,9 +957,6 @@ define void @ubConv2qp_03(ptr nocapture %a) {
; CHECK-P8-LABEL: ubConv2qp_03:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: mflr r0
-; CHECK-P8-NEXT: .cfi_def_cfa_offset 48
-; CHECK-P8-NEXT: .cfi_offset lr, 16
-; CHECK-P8-NEXT: .cfi_offset r30, -16
; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: stdu r1, -48(r1)
; CHECK-P8-NEXT: mr r30, r3
@@ -1068,7 +984,6 @@ entry:
; Function Attrs: norecurse nounwind
define void @ubConv2qp_04(ptr nocapture %a, i8 zeroext %b,
- ptr nocapture readonly %c) {
; CHECK-LABEL: ubConv2qp_04:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lbz r5, 0(r5)
@@ -1081,9 +996,6 @@ define void @ubConv2qp_04(ptr nocapture %a, i8 zeroext %b,
; CHECK-P8-LABEL: ubConv2qp_04:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: mflr r0
-; CHECK-P8-NEXT: .cfi_def_cfa_offset 48
-; CHECK-P8-NEXT: .cfi_offset lr, 16
-; CHECK-P8-NEXT: .cfi_offset r30, -16
; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: stdu r1, -48(r1)
; CHECK-P8-NEXT: std r0, 64(r1)
@@ -1100,6 +1012,7 @@ define void @ubConv2qp_04(ptr nocapture %a, i8 zeroext %b,
; CHECK-P8-NEXT: ld r30, -16(r1) # 8-byte Folded Reload
; CHECK-P8-NEXT: mtlr r0
; CHECK-P8-NEXT: blr
+ ptr nocapture readonly %c) nounwind {
entry:
%conv = zext i8 %b to i32
%i = load i8, ptr %c, align 1
@@ -1121,7 +1034,7 @@ entry:
@f128global = global fp128 0xL300000000000000040089CA8F5C28F5C, align 16
; Function Attrs: norecurse nounwind readonly
-define double @qpConv2dp(ptr nocapture readonly %a) {
+define double @qpConv2dp(ptr nocapture readonly %a) nounwind {
; CHECK-LABEL: qpConv2dp:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lxv v2, 0(r3)
@@ -1134,8 +1047,6 @@ define double @qpConv2dp(ptr nocapture readonly %a) {
; CHECK-P8-NEXT: mflr r0
; CHECK-P8-NEXT: stdu r1, -32(r1)
; CHECK-P8-NEXT: std r0, 48(r1)
-; CHECK-P8-NEXT: .cfi_def_cfa_offset 32
-; CHECK-P8-NEXT: .cfi_offset lr, 16
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: bl __trunckfdf2
@@ -1151,7 +1062,7 @@ entry:
}
; Function Attrs: norecurse nounwind
-define void @qpConv2dp_02(ptr nocapture %res) {
+define void @qpConv2dp_02(ptr nocapture %res) nounwind {
; CHECK-LABEL: qpConv2dp_02:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: addis r4, r2, .LC6 at toc@ha
@@ -1164,9 +1075,6 @@ define void @qpConv2dp_02(ptr nocapture %res) {
; CHECK-P8-LABEL: qpConv2dp_02:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: mflr r0
-; CHECK-P8-NEXT: .cfi_def_cfa_offset 48
-; CHECK-P8-NEXT: .cfi_offset lr, 16
-; CHECK-P8-NEXT: .cfi_offset r30, -16
; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: stdu r1, -48(r1)
; CHECK-P8-NEXT: mr r30, r3
@@ -1191,7 +1099,7 @@ entry:
}
; Function Attrs: norecurse nounwind
-define void @qpConv2dp_03(ptr nocapture %res, i32 signext %idx) {
+define void @qpConv2dp_03(ptr nocapture %res, i32 signext %idx) nounwind {
; CHECK-LABEL: qpConv2dp_03:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: addis r5, r2, .LC7 at toc@ha
@@ -1205,10 +1113,6 @@ define void @qpConv2dp_03(ptr nocapture %res, i32 signext %idx) {
; CHECK-P8-LABEL: qpConv2dp_03:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: mflr r0
-; CHECK-P8-NEXT: .cfi_def_cfa_offset 64
-; CHECK-P8-NEXT: .cfi_offset lr, 16
-; CHECK-P8-NEXT: .cfi_offset r29, -24
-; CHECK-P8-NEXT: .cfi_offset r30, -16
; CHECK-P8-NEXT: std r29, -24(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: stdu r1, -64(r1)
@@ -1239,7 +1143,7 @@ entry:
}
; Function Attrs: norecurse nounwind
-define void @qpConv2dp_04(ptr nocapture readonly %a, ptr nocapture readonly %b, ptr nocapture %res) {
+define void @qpConv2dp_04(ptr nocapture readonly %a, ptr nocapture readonly %b,
; CHECK-LABEL: qpConv2dp_04:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lxv v2, 0(r3)
@@ -1252,9 +1156,6 @@ define void @qpConv2dp_04(ptr nocapture readonly %a, ptr nocapture readonly %b,
; CHECK-P8-LABEL: qpConv2dp_04:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: mflr r0
-; CHECK-P8-NEXT: .cfi_def_cfa_offset 48
-; CHECK-P8-NEXT: .cfi_offset lr, 16
-; CHECK-P8-NEXT: .cfi_offset r30, -16
; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: stdu r1, -48(r1)
; CHECK-P8-NEXT: std r0, 64(r1)
@@ -1273,6 +1174,7 @@ define void @qpConv2dp_04(ptr nocapture readonly %a, ptr nocapture readonly %b,
; CHECK-P8-NEXT: ld r30, -16(r1) # 8-byte Folded Reload
; CHECK-P8-NEXT: mtlr r0
; CHECK-P8-NEXT: blr
+ ptr nocapture %res) nounwind {
entry:
%i = load fp128, ptr %a, align 16
%1 = load fp128, ptr %b, align 16
@@ -1285,7 +1187,7 @@ entry:
; Convert QP to SP
; Function Attrs: norecurse nounwind readonly
-define float @qpConv2sp(ptr nocapture readonly %a) {
+define float @qpConv2sp(ptr nocapture readonly %a) nounwind {
; CHECK-LABEL: qpConv2sp:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lxv v2, 0(r3)
@@ -1298,8 +1200,6 @@ define float @qpConv2sp(ptr nocapture readonly %a) {
; CHECK-P8-NEXT: mflr r0
; CHECK-P8-NEXT: stdu r1, -32(r1)
; CHECK-P8-NEXT: std r0, 48(r1)
-; CHECK-P8-NEXT: .cfi_def_cfa_offset 32
-; CHECK-P8-NEXT: .cfi_offset lr, 16
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: bl __trunckfsf2
@@ -1315,7 +1215,7 @@ entry:
}
; Function Attrs: norecurse nounwind
-define void @qpConv2sp_02(ptr nocapture %res) {
+define void @qpConv2sp_02(ptr nocapture %res) nounwind {
; CHECK-LABEL: qpConv2sp_02:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: addis r4, r2, .LC6 at toc@ha
@@ -1329,9 +1229,6 @@ define void @qpConv2sp_02(ptr nocapture %res) {
; CHECK-P8-LABEL: qpConv2sp_02:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: mflr r0
-; CHECK-P8-NEXT: .cfi_def_cfa_offset 48
-; CHECK-P8-NEXT: .cfi_offset lr, 16
-; CHECK-P8-NEXT: .cfi_offset r30, -16
; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: stdu r1, -48(r1)
; CHECK-P8-NEXT: mr r30, r3
@@ -1356,7 +1253,7 @@ entry:
}
; Function Attrs: norecurse nounwind
-define void @qpConv2sp_03(ptr nocapture %res, i32 signext %idx) {
+define void @qpConv2sp_03(ptr nocapture %res, i32 signext %idx) nounwind {
; CHECK-LABEL: qpConv2sp_03:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: addis r5, r2, .LC7 at toc@ha
@@ -1371,10 +1268,6 @@ define void @qpConv2sp_03(ptr nocapture %res, i32 signext %idx) {
; CHECK-P8-LABEL: qpConv2sp_03:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: mflr r0
-; CHECK-P8-NEXT: .cfi_def_cfa_offset 64
-; CHECK-P8-NEXT: .cfi_offset lr, 16
-; CHECK-P8-NEXT: .cfi_offset r29, -24
-; CHECK-P8-NEXT: .cfi_offset r30, -16
; CHECK-P8-NEXT: std r29, -24(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: stdu r1, -64(r1)
@@ -1406,7 +1299,7 @@ entry:
}
; Function Attrs: norecurse nounwind
-define void @qpConv2sp_04(ptr nocapture readonly %a, ptr nocapture readonly %b, ptr nocapture %res) {
+define void @qpConv2sp_04(ptr nocapture readonly %a, ptr nocapture readonly %b,
; CHECK-LABEL: qpConv2sp_04:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lxv v2, 0(r3)
@@ -1420,9 +1313,6 @@ define void @qpConv2sp_04(ptr nocapture readonly %a, ptr nocapture readonly %b,
; CHECK-P8-LABEL: qpConv2sp_04:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: mflr r0
-; CHECK-P8-NEXT: .cfi_def_cfa_offset 48
-; CHECK-P8-NEXT: .cfi_offset lr, 16
-; CHECK-P8-NEXT: .cfi_offset r30, -16
; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: stdu r1, -48(r1)
; CHECK-P8-NEXT: std r0, 64(r1)
@@ -1441,6 +1331,7 @@ define void @qpConv2sp_04(ptr nocapture readonly %a, ptr nocapture readonly %b,
; CHECK-P8-NEXT: ld r30, -16(r1) # 8-byte Folded Reload
; CHECK-P8-NEXT: mtlr r0
; CHECK-P8-NEXT: blr
+ ptr nocapture %res) nounwind {
entry:
%i = load fp128, ptr %a, align 16
%1 = load fp128, ptr %b, align 16
@@ -1450,14 +1341,12 @@ entry:
ret void
}
-define half @trunc(fp128 %a) {
+define half @trunc(fp128 %a) nounwind {
; CHECK-LABEL: trunc:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: mflr r0
; CHECK-NEXT: stdu r1, -32(r1)
; CHECK-NEXT: std r0, 48(r1)
-; CHECK-NEXT: .cfi_def_cfa_offset 32
-; CHECK-NEXT: .cfi_offset lr, 16
; CHECK-NEXT: bl __trunctfhf2
; CHECK-NEXT: nop
; CHECK-NEXT: clrlwi r3, r3, 16
@@ -1473,8 +1362,6 @@ define half @trunc(fp128 %a) {
; CHECK-P8-NEXT: mflr r0
; CHECK-P8-NEXT: stdu r1, -32(r1)
; CHECK-P8-NEXT: std r0, 48(r1)
-; CHECK-P8-NEXT: .cfi_def_cfa_offset 32
-; CHECK-P8-NEXT: .cfi_offset lr, 16
; CHECK-P8-NEXT: bl __trunctfhf2
; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: clrldi r3, r3, 48
@@ -1489,7 +1376,7 @@ entry:
ret half %i
}
-define fp128 @ext(half %a) {
+define fp128 @ext(half %a) nounwind {
; CHECK-LABEL: ext:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xscpsgndp v2, f1, f1
@@ -1501,8 +1388,6 @@ define fp128 @ext(half %a) {
; CHECK-P8-NEXT: mflr r0
; CHECK-P8-NEXT: stdu r1, -32(r1)
; CHECK-P8-NEXT: std r0, 48(r1)
-; CHECK-P8-NEXT: .cfi_def_cfa_offset 32
-; CHECK-P8-NEXT: .cfi_offset lr, 16
; CHECK-P8-NEXT: bl __extendsfkf2
; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: addi r1, r1, 32
@@ -1517,7 +1402,7 @@ entry:
@f128Glob = common global fp128 0xL00000000000000000000000000000000, align 16
; Function Attrs: norecurse nounwind readnone
-define fp128 @dpConv2qp(double %a) {
+define fp128 @dpConv2qp(double %a) nounwind {
; CHECK-LABEL: dpConv2qp:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xscpsgndp v2, f1, f1
@@ -1529,8 +1414,6 @@ define fp128 @dpConv2qp(double %a) {
; CHECK-P8-NEXT: mflr r0
; CHECK-P8-NEXT: stdu r1, -32(r1)
; CHECK-P8-NEXT: std r0, 48(r1)
-; CHECK-P8-NEXT: .cfi_def_cfa_offset 32
-; CHECK-P8-NEXT: .cfi_offset lr, 16
; CHECK-P8-NEXT: bl __extenddfkf2
; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: addi r1, r1, 32
@@ -1543,7 +1426,7 @@ entry:
}
; Function Attrs: norecurse nounwind
-define void @dpConv2qp_02(ptr nocapture readonly %a) {
+define void @dpConv2qp_02(ptr nocapture readonly %a) nounwind {
; CHECK-LABEL: dpConv2qp_02:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lxsd v2, 0(r3)
@@ -1558,8 +1441,6 @@ define void @dpConv2qp_02(ptr nocapture readonly %a) {
; CHECK-P8-NEXT: mflr r0
; CHECK-P8-NEXT: stdu r1, -32(r1)
; CHECK-P8-NEXT: std r0, 48(r1)
-; CHECK-P8-NEXT: .cfi_def_cfa_offset 32
-; CHECK-P8-NEXT: .cfi_offset lr, 16
; CHECK-P8-NEXT: lfd f1, 0(r3)
; CHECK-P8-NEXT: bl __extenddfkf2
; CHECK-P8-NEXT: nop
@@ -1579,7 +1460,7 @@ entry:
}
; Function Attrs: norecurse nounwind
-define void @dpConv2qp_02b(ptr nocapture readonly %a, i32 signext %idx) {
+define void @dpConv2qp_02b(ptr nocapture readonly %a, i32 signext %idx) nounwind {
; CHECK-LABEL: dpConv2qp_02b:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: sldi r4, r4, 3
@@ -1594,10 +1475,8 @@ define void @dpConv2qp_02b(ptr nocapture readonly %a, i32 signext %idx) {
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: mflr r0
; CHECK-P8-NEXT: stdu r1, -32(r1)
-; CHECK-P8-NEXT: std r0, 48(r1)
-; CHECK-P8-NEXT: .cfi_def_cfa_offset 32
-; CHECK-P8-NEXT: .cfi_offset lr, 16
; CHECK-P8-NEXT: sldi r4, r4, 3
+; CHECK-P8-NEXT: std r0, 48(r1)
; CHECK-P8-NEXT: lfdx f1, r3, r4
; CHECK-P8-NEXT: bl __extenddfkf2
; CHECK-P8-NEXT: nop
@@ -1619,7 +1498,7 @@ entry:
}
; Function Attrs: norecurse nounwind
-define void @dpConv2qp_03(ptr nocapture %res, i32 signext %idx, double %a) {
+define void @dpConv2qp_03(ptr nocapture %res, i32 signext %idx, double %a) nounwind {
; CHECK-LABEL: dpConv2qp_03:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xscpsgndp v2, f1, f1
@@ -1631,10 +1510,6 @@ define void @dpConv2qp_03(ptr nocapture %res, i32 signext %idx, double %a) {
; CHECK-P8-LABEL: dpConv2qp_03:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: mflr r0
-; CHECK-P8-NEXT: .cfi_def_cfa_offset 64
-; CHECK-P8-NEXT: .cfi_offset lr, 16
-; CHECK-P8-NEXT: .cfi_offset r29, -24
-; CHECK-P8-NEXT: .cfi_offset r30, -16
; CHECK-P8-NEXT: std r29, -24(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: stdu r1, -64(r1)
@@ -1661,7 +1536,7 @@ entry:
}
; Function Attrs: norecurse nounwind
-define void @dpConv2qp_04(double %a, ptr nocapture %res) {
+define void @dpConv2qp_04(double %a, ptr nocapture %res) nounwind {
; CHECK-LABEL: dpConv2qp_04:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xscpsgndp v2, f1, f1
@@ -1672,9 +1547,6 @@ define void @dpConv2qp_04(double %a, ptr nocapture %res) {
; CHECK-P8-LABEL: dpConv2qp_04:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: mflr r0
-; CHECK-P8-NEXT: .cfi_def_cfa_offset 48
-; CHECK-P8-NEXT: .cfi_offset lr, 16
-; CHECK-P8-NEXT: .cfi_offset r30, -16
; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: stdu r1, -48(r1)
; CHECK-P8-NEXT: std r0, 64(r1)
@@ -1695,7 +1567,7 @@ entry:
}
; Function Attrs: norecurse nounwind readnone
-define fp128 @spConv2qp(float %a) {
+define fp128 @spConv2qp(float %a) nounwind {
; CHECK-LABEL: spConv2qp:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xscpsgndp v2, f1, f1
@@ -1707,8 +1579,6 @@ define fp128 @spConv2qp(float %a) {
; CHECK-P8-NEXT: mflr r0
; CHECK-P8-NEXT: stdu r1, -32(r1)
; CHECK-P8-NEXT: std r0, 48(r1)
-; CHECK-P8-NEXT: .cfi_def_cfa_offset 32
-; CHECK-P8-NEXT: .cfi_offset lr, 16
; CHECK-P8-NEXT: bl __extendsfkf2
; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: addi r1, r1, 32
@@ -1721,7 +1591,7 @@ entry:
}
; Function Attrs: norecurse nounwind
-define void @spConv2qp_02(ptr nocapture readonly %a) {
+define void @spConv2qp_02(ptr nocapture readonly %a) nounwind {
; CHECK-LABEL: spConv2qp_02:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lxssp v2, 0(r3)
@@ -1736,8 +1606,6 @@ define void @spConv2qp_02(ptr nocapture readonly %a) {
; CHECK-P8-NEXT: mflr r0
; CHECK-P8-NEXT: stdu r1, -32(r1)
; CHECK-P8-NEXT: std r0, 48(r1)
-; CHECK-P8-NEXT: .cfi_def_cfa_offset 32
-; CHECK-P8-NEXT: .cfi_offset lr, 16
; CHECK-P8-NEXT: lfs f1, 0(r3)
; CHECK-P8-NEXT: bl __extendsfkf2
; CHECK-P8-NEXT: nop
@@ -1757,7 +1625,7 @@ entry:
}
; Function Attrs: norecurse nounwind
-define void @spConv2qp_02b(ptr nocapture readonly %a, i32 signext %idx) {
+define void @spConv2qp_02b(ptr nocapture readonly %a, i32 signext %idx) nounwind {
; CHECK-LABEL: spConv2qp_02b:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: sldi r4, r4, 2
@@ -1772,10 +1640,8 @@ define void @spConv2qp_02b(ptr nocapture readonly %a, i32 signext %idx) {
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: mflr r0
; CHECK-P8-NEXT: stdu r1, -32(r1)
-; CHECK-P8-NEXT: std r0, 48(r1)
-; CHECK-P8-NEXT: .cfi_def_cfa_offset 32
-; CHECK-P8-NEXT: .cfi_offset lr, 16
; CHECK-P8-NEXT: sldi r4, r4, 2
+; CHECK-P8-NEXT: std r0, 48(r1)
; CHECK-P8-NEXT: lfsx f1, r3, r4
; CHECK-P8-NEXT: bl __extendsfkf2
; CHECK-P8-NEXT: nop
@@ -1797,7 +1663,7 @@ entry:
}
; Function Attrs: norecurse nounwind
-define void @spConv2qp_03(ptr nocapture %res, i32 signext %idx, float %a) {
+define void @spConv2qp_03(ptr nocapture %res, i32 signext %idx, float %a) nounwind {
; CHECK-LABEL: spConv2qp_03:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xscpsgndp v2, f1, f1
@@ -1809,10 +1675,6 @@ define void @spConv2qp_03(ptr nocapture %res, i32 signext %idx, float %a) {
; CHECK-P8-LABEL: spConv2qp_03:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: mflr r0
-; CHECK-P8-NEXT: .cfi_def_cfa_offset 64
-; CHECK-P8-NEXT: .cfi_offset lr, 16
-; CHECK-P8-NEXT: .cfi_offset r29, -24
-; CHECK-P8-NEXT: .cfi_offset r30, -16
; CHECK-P8-NEXT: std r29, -24(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: stdu r1, -64(r1)
@@ -1839,7 +1701,7 @@ entry:
}
; Function Attrs: norecurse nounwind
-define void @spConv2qp_04(float %a, ptr nocapture %res) {
+define void @spConv2qp_04(float %a, ptr nocapture %res) nounwind {
; CHECK-LABEL: spConv2qp_04:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xscpsgndp v2, f1, f1
@@ -1850,9 +1712,6 @@ define void @spConv2qp_04(float %a, ptr nocapture %res) {
; CHECK-P8-LABEL: spConv2qp_04:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: mflr r0
-; CHECK-P8-NEXT: .cfi_def_cfa_offset 48
-; CHECK-P8-NEXT: .cfi_offset lr, 16
-; CHECK-P8-NEXT: .cfi_offset r30, -16
; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: stdu r1, -48(r1)
; CHECK-P8-NEXT: std r0, 64(r1)
@@ -1874,7 +1733,7 @@ entry:
; Function Attrs: norecurse nounwind
-define void @cvdp2sw2qp(double %val, ptr nocapture %res) {
+define void @cvdp2sw2qp(double %val, ptr nocapture %res) nounwind {
; CHECK-LABEL: cvdp2sw2qp:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xscvdpsxws v2, f1
@@ -1886,9 +1745,6 @@ define void @cvdp2sw2qp(double %val, ptr nocapture %res) {
; CHECK-P8-LABEL: cvdp2sw2qp:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: mflr r0
-; CHECK-P8-NEXT: .cfi_def_cfa_offset 48
-; CHECK-P8-NEXT: .cfi_offset lr, 16
-; CHECK-P8-NEXT: .cfi_offset r30, -16
; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: stdu r1, -48(r1)
; CHECK-P8-NEXT: xscvdpsxws f0, f1
@@ -1913,7 +1769,7 @@ entry:
}
; Function Attrs: norecurse nounwind
-define void @cvdp2sdw2qp(double %val, ptr nocapture %res) {
+define void @cvdp2sdw2qp(double %val, ptr nocapture %res) nounwind {
; CHECK-LABEL: cvdp2sdw2qp:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xscvdpsxds v2, f1
@@ -1924,9 +1780,6 @@ define void @cvdp2sdw2qp(double %val, ptr nocapture %res) {
; CHECK-P8-LABEL: cvdp2sdw2qp:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: mflr r0
-; CHECK-P8-NEXT: .cfi_def_cfa_offset 48
-; CHECK-P8-NEXT: .cfi_offset lr, 16
-; CHECK-P8-NEXT: .cfi_offset r30, -16
; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: stdu r1, -48(r1)
; CHECK-P8-NEXT: xscvdpsxds f0, f1
@@ -1950,7 +1803,7 @@ entry:
}
; Function Attrs: norecurse nounwind
-define void @cvsp2sw2qp(float %val, ptr nocapture %res) {
+define void @cvsp2sw2qp(float %val, ptr nocapture %res) nounwind {
; CHECK-LABEL: cvsp2sw2qp:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xscvdpsxws v2, f1
@@ -1962,9 +1815,6 @@ define void @cvsp2sw2qp(float %val, ptr nocapture %res) {
; CHECK-P8-LABEL: cvsp2sw2qp:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: mflr r0
-; CHECK-P8-NEXT: .cfi_def_cfa_offset 48
-; CHECK-P8-NEXT: .cfi_offset lr, 16
-; CHECK-P8-NEXT: .cfi_offset r30, -16
; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: stdu r1, -48(r1)
; CHECK-P8-NEXT: xscvdpsxws f0, f1
@@ -1989,7 +1839,7 @@ entry:
}
; Function Attrs: norecurse nounwind
-define void @cvsp2sdw2qp(float %val, ptr nocapture %res) {
+define void @cvsp2sdw2qp(float %val, ptr nocapture %res) nounwind {
; CHECK-LABEL: cvsp2sdw2qp:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xscvdpsxds v2, f1
@@ -2000,9 +1850,6 @@ define void @cvsp2sdw2qp(float %val, ptr nocapture %res) {
; CHECK-P8-LABEL: cvsp2sdw2qp:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: mflr r0
-; CHECK-P8-NEXT: .cfi_def_cfa_offset 48
-; CHECK-P8-NEXT: .cfi_offset lr, 16
-; CHECK-P8-NEXT: .cfi_offset r30, -16
; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: stdu r1, -48(r1)
; CHECK-P8-NEXT: xscvdpsxds f0, f1
@@ -2026,7 +1873,7 @@ entry:
}
; Function Attrs: norecurse nounwind
-define void @cvdp2uw2qp(double %val, ptr nocapture %res) {
+define void @cvdp2uw2qp(double %val, ptr nocapture %res) nounwind {
; CHECK-LABEL: cvdp2uw2qp:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xscvdpuxws f0, f1
@@ -2038,9 +1885,6 @@ define void @cvdp2uw2qp(double %val, ptr nocapture %res) {
; CHECK-P8-LABEL: cvdp2uw2qp:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: mflr r0
-; CHECK-P8-NEXT: .cfi_def_cfa_offset 48
-; CHECK-P8-NEXT: .cfi_offset lr, 16
-; CHECK-P8-NEXT: .cfi_offset r30, -16
; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: stdu r1, -48(r1)
; CHECK-P8-NEXT: xscvdpuxws f0, f1
@@ -2064,7 +1908,7 @@ entry:
}
; Function Attrs: norecurse nounwind
-define void @cvdp2udw2qp(double %val, ptr nocapture %res) {
+define void @cvdp2udw2qp(double %val, ptr nocapture %res) nounwind {
; CHECK-LABEL: cvdp2udw2qp:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xscvdpuxds v2, f1
@@ -2075,9 +1919,6 @@ define void @cvdp2udw2qp(double %val, ptr nocapture %res) {
; CHECK-P8-LABEL: cvdp2udw2qp:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: mflr r0
-; CHECK-P8-NEXT: .cfi_def_cfa_offset 48
-; CHECK-P8-NEXT: .cfi_offset lr, 16
-; CHECK-P8-NEXT: .cfi_offset r30, -16
; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: stdu r1, -48(r1)
; CHECK-P8-NEXT: xscvdpuxds f0, f1
@@ -2101,7 +1942,7 @@ entry:
}
; Function Attrs: norecurse nounwind
-define void @cvsp2uw2qp(float %val, ptr nocapture %res) {
+define void @cvsp2uw2qp(float %val, ptr nocapture %res) nounwind {
; CHECK-LABEL: cvsp2uw2qp:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xscvdpuxws f0, f1
@@ -2113,9 +1954,6 @@ define void @cvsp2uw2qp(float %val, ptr nocapture %res) {
; CHECK-P8-LABEL: cvsp2uw2qp:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: mflr r0
-; CHECK-P8-NEXT: .cfi_def_cfa_offset 48
-; CHECK-P8-NEXT: .cfi_offset lr, 16
-; CHECK-P8-NEXT: .cfi_offset r30, -16
; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: stdu r1, -48(r1)
; CHECK-P8-NEXT: xscvdpuxws f0, f1
@@ -2139,7 +1977,7 @@ entry:
}
; Function Attrs: norecurse nounwind
-define void @cvsp2udw2qp(float %val, ptr nocapture %res) {
+define void @cvsp2udw2qp(float %val, ptr nocapture %res) nounwind {
; CHECK-LABEL: cvsp2udw2qp:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xscvdpuxds v2, f1
@@ -2150,9 +1988,6 @@ define void @cvsp2udw2qp(float %val, ptr nocapture %res) {
; CHECK-P8-LABEL: cvsp2udw2qp:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: mflr r0
-; CHECK-P8-NEXT: .cfi_def_cfa_offset 48
-; CHECK-P8-NEXT: .cfi_offset lr, 16
-; CHECK-P8-NEXT: .cfi_offset r30, -16
; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: stdu r1, -48(r1)
; CHECK-P8-NEXT: xscvdpuxds f0, f1
@@ -2176,14 +2011,12 @@ entry:
}
; Function Attrs: norecurse nounwind readonly
-define i128 @qpConv2i128(ptr nocapture readonly %a) {
+define i128 @qpConv2i128(ptr nocapture readonly %a) nounwind {
; CHECK-LABEL: qpConv2i128:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: mflr r0
; CHECK-NEXT: stdu r1, -32(r1)
; CHECK-NEXT: std r0, 48(r1)
-; CHECK-NEXT: .cfi_def_cfa_offset 32
-; CHECK-NEXT: .cfi_offset lr, 16
; CHECK-NEXT: lxv v2, 0(r3)
; CHECK-NEXT: bl __fixkfti
; CHECK-NEXT: nop
@@ -2197,8 +2030,6 @@ define i128 @qpConv2i128(ptr nocapture readonly %a) {
; CHECK-P8-NEXT: mflr r0
; CHECK-P8-NEXT: stdu r1, -32(r1)
; CHECK-P8-NEXT: std r0, 48(r1)
-; CHECK-P8-NEXT: .cfi_def_cfa_offset 32
-; CHECK-P8-NEXT: .cfi_offset lr, 16
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: bl __fixkfti
@@ -2214,14 +2045,12 @@ entry:
}
; Function Attrs: norecurse nounwind readonly
-define i128 @qpConv2ui128(ptr nocapture readonly %a) {
+define i128 @qpConv2ui128(ptr nocapture readonly %a) nounwind {
; CHECK-LABEL: qpConv2ui128:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: mflr r0
; CHECK-NEXT: stdu r1, -32(r1)
; CHECK-NEXT: std r0, 48(r1)
-; CHECK-NEXT: .cfi_def_cfa_offset 32
-; CHECK-NEXT: .cfi_offset lr, 16
; CHECK-NEXT: lxv v2, 0(r3)
; CHECK-NEXT: bl __fixunskfti
; CHECK-NEXT: nop
@@ -2235,8 +2064,6 @@ define i128 @qpConv2ui128(ptr nocapture readonly %a) {
; CHECK-P8-NEXT: mflr r0
; CHECK-P8-NEXT: stdu r1, -32(r1)
; CHECK-P8-NEXT: std r0, 48(r1)
-; CHECK-P8-NEXT: .cfi_def_cfa_offset 32
-; CHECK-P8-NEXT: .cfi_offset lr, 16
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: bl __fixunskfti
@@ -2252,7 +2079,7 @@ entry:
}
; Function Attrs: norecurse nounwind readonly
-define i1 @qpConv2ui1(ptr nocapture readonly %a) {
+define i1 @qpConv2ui1(ptr nocapture readonly %a) nounwind {
; CHECK-LABEL: qpConv2ui1:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lxv v2, 0(r3)
@@ -2265,8 +2092,6 @@ define i1 @qpConv2ui1(ptr nocapture readonly %a) {
; CHECK-P8-NEXT: mflr r0
; CHECK-P8-NEXT: stdu r1, -32(r1)
; CHECK-P8-NEXT: std r0, 48(r1)
-; CHECK-P8-NEXT: .cfi_def_cfa_offset 32
-; CHECK-P8-NEXT: .cfi_offset lr, 16
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: bl __fixkfsi
@@ -2282,7 +2107,7 @@ entry:
}
; Function Attrs: norecurse nounwind readonly
-define i1 @qpConv2si1(ptr nocapture readonly %a) {
+define i1 @qpConv2si1(ptr nocapture readonly %a) nounwind {
; CHECK-LABEL: qpConv2si1:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lxv v2, 0(r3)
@@ -2295,8 +2120,6 @@ define i1 @qpConv2si1(ptr nocapture readonly %a) {
; CHECK-P8-NEXT: mflr r0
; CHECK-P8-NEXT: stdu r1, -32(r1)
; CHECK-P8-NEXT: std r0, 48(r1)
-; CHECK-P8-NEXT: .cfi_def_cfa_offset 32
-; CHECK-P8-NEXT: .cfi_offset lr, 16
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: bl __fixkfsi
>From f3a82f5f62fdba2a8dc30a307665ddc91b8e3d0e Mon Sep 17 00:00:00 2001
From: Lei Huang <lei at ca.ibm.com>
Date: Tue, 18 Mar 2025 14:44:38 -0400
Subject: [PATCH 7/7] As per review comment from Trevor G
---
llvm/lib/IR/RuntimeLibcalls.cpp | 1 +
llvm/test/CodeGen/PowerPC/f128-conv.ll | 4 ++--
llvm/test/CodeGen/PowerPC/fp128-libcalls.ll | 2 +-
3 files changed, 4 insertions(+), 3 deletions(-)
diff --git a/llvm/lib/IR/RuntimeLibcalls.cpp b/llvm/lib/IR/RuntimeLibcalls.cpp
index 1f94400f7c088..90c3bf0db0236 100644
--- a/llvm/lib/IR/RuntimeLibcalls.cpp
+++ b/llvm/lib/IR/RuntimeLibcalls.cpp
@@ -82,6 +82,7 @@ void RuntimeLibcallsInfo::initLibcalls(const Triple &TT) {
setLibcallName(RTLIB::POWI_F128, "__powikf2");
setLibcallName(RTLIB::FPEXT_F32_F128, "__extendsfkf2");
setLibcallName(RTLIB::FPEXT_F64_F128, "__extenddfkf2");
+ setLibcallName(RTLIB::FPROUND_F128_F16, "__trunckfhf2");
setLibcallName(RTLIB::FPROUND_F128_F32, "__trunckfsf2");
setLibcallName(RTLIB::FPROUND_F128_F64, "__trunckfdf2");
setLibcallName(RTLIB::FPTOSINT_F128_I32, "__fixkfsi");
diff --git a/llvm/test/CodeGen/PowerPC/f128-conv.ll b/llvm/test/CodeGen/PowerPC/f128-conv.ll
index 3ecf00bd84ae4..f8b2861156db4 100644
--- a/llvm/test/CodeGen/PowerPC/f128-conv.ll
+++ b/llvm/test/CodeGen/PowerPC/f128-conv.ll
@@ -1347,7 +1347,7 @@ define half @trunc(fp128 %a) nounwind {
; CHECK-NEXT: mflr r0
; CHECK-NEXT: stdu r1, -32(r1)
; CHECK-NEXT: std r0, 48(r1)
-; CHECK-NEXT: bl __trunctfhf2
+; CHECK-NEXT: bl __trunckfhf2
; CHECK-NEXT: nop
; CHECK-NEXT: clrlwi r3, r3, 16
; CHECK-NEXT: mtfprwz f0, r3
@@ -1362,7 +1362,7 @@ define half @trunc(fp128 %a) nounwind {
; CHECK-P8-NEXT: mflr r0
; CHECK-P8-NEXT: stdu r1, -32(r1)
; CHECK-P8-NEXT: std r0, 48(r1)
-; CHECK-P8-NEXT: bl __trunctfhf2
+; CHECK-P8-NEXT: bl __trunckfhf2
; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: clrldi r3, r3, 48
; CHECK-P8-NEXT: bl __extendhfsf2
diff --git a/llvm/test/CodeGen/PowerPC/fp128-libcalls.ll b/llvm/test/CodeGen/PowerPC/fp128-libcalls.ll
index 5b8bdb17b1200..e348d40a4cc74 100644
--- a/llvm/test/CodeGen/PowerPC/fp128-libcalls.ll
+++ b/llvm/test/CodeGen/PowerPC/fp128-libcalls.ll
@@ -55,7 +55,7 @@ define fp128 @extenddfkf2(double %a) {
define half @trunctfhf2(fp128 %a) {
; CHECK-LABEL: trunctfhf2:
-; CHECK: __trunctfhf2
+; CHECK: __trunckfhf2
entry:
%i = fptrunc fp128 %a to half
ret half %i
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