[llvm] [AMDGPU][True16][CodeGen] fix moveToVALU with proper subreg access in true16 (PR #131859)

[Joe Nash via llvm-commits]

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@@ -257,7 +257,13 @@ static bool tryChangeVGPRtoSGPRinCopy(MachineInstr &MI,
       return false;
   }
   // Change VGPR to SGPR destination.
-  MRI.setRegClass(DstReg, TRI->getEquivalentSGPRClass(MRI.getRegClass(DstReg)));
+  const auto *RC = MRI.getRegClass(DstReg);
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Sisyph wrote:

Can you split the patch so the changes to SIFixSGPRCopies and SIInstrInfo are in different patches? It looks like there might not be any test coverage of the SIFixSGPRCopies  changes.

https://github.com/llvm/llvm-project/pull/131859