[llvm] [CostModel][X86] merge integer arithmetic costs tests using -cost-kind=all (PR #131840)
via llvm-commits
llvm-commits at lists.llvm.org
Tue Mar 18 09:10:01 PDT 2025
llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-backend-x86
Author: Simon Pilgrim (RKSimon)
<details>
<summary>Changes</summary>
---
Patch is 402.90 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/131840.diff
4 Files Affected:
- (removed) llvm/test/Analysis/CostModel/X86/arith-int-codesize.ll (-1014)
- (removed) llvm/test/Analysis/CostModel/X86/arith-int-latency.ll (-854)
- (removed) llvm/test/Analysis/CostModel/X86/arith-int-sizelatency.ll (-854)
- (modified) llvm/test/Analysis/CostModel/X86/arith-int.ll (+873-869)
``````````diff
diff --git a/llvm/test/Analysis/CostModel/X86/arith-int-codesize.ll b/llvm/test/Analysis/CostModel/X86/arith-int-codesize.ll
deleted file mode 100644
index f5ad65817950e..0000000000000
--- a/llvm/test/Analysis/CostModel/X86/arith-int-codesize.ll
+++ /dev/null
@@ -1,1014 +0,0 @@
-; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py
-; RUN: opt < %s -passes="print<cost-model>" 2>&1 -disable-output -cost-kind=code-size -mtriple=x86_64-- -mattr=+ssse3 | FileCheck %s --check-prefixes=SSE,SSE2
-; RUN: opt < %s -passes="print<cost-model>" 2>&1 -disable-output -cost-kind=code-size -mtriple=x86_64-- -mattr=+sse4.2 | FileCheck %s --check-prefixes=SSE,SSE42
-; RUN: opt < %s -passes="print<cost-model>" 2>&1 -disable-output -cost-kind=code-size -mtriple=x86_64-- -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1
-; RUN: opt < %s -passes="print<cost-model>" 2>&1 -disable-output -cost-kind=code-size -mtriple=x86_64-- -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2
-; RUN: opt < %s -passes="print<cost-model>" 2>&1 -disable-output -cost-kind=code-size -mtriple=x86_64-- -mattr=+avx512f | FileCheck %s --check-prefixes=AVX512F
-; RUN: opt < %s -passes="print<cost-model>" 2>&1 -disable-output -cost-kind=code-size -mtriple=x86_64-- -mattr=+avx512f,+avx512bw | FileCheck %s --check-prefixes=AVX512BW
-; RUN: opt < %s -passes="print<cost-model>" 2>&1 -disable-output -cost-kind=code-size -mtriple=x86_64-- -mattr=+avx512f,+avx512dq | FileCheck %s --check-prefixes=AVX512DQ
-;
-; RUN: opt < %s -passes="print<cost-model>" 2>&1 -disable-output -cost-kind=code-size -mtriple=x86_64-- -mcpu=slm | FileCheck %s --check-prefixes=SSE,SLM
-; RUN: opt < %s -passes="print<cost-model>" 2>&1 -disable-output -cost-kind=code-size -mtriple=x86_64-- -mcpu=goldmont | FileCheck %s --check-prefixes=SSE,SSE42
-; RUN: opt < %s -passes="print<cost-model>" 2>&1 -disable-output -cost-kind=code-size -mtriple=x86_64-- -mcpu=btver2 | FileCheck %s --check-prefixes=AVX,AVX1
-
-define i32 @add(i32 %arg) {
-; SSE-LABEL: 'add'
-; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I64 = add i64 undef, undef
-; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2I64 = add <2 x i64> undef, undef
-; SSE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4I64 = add <4 x i64> undef, undef
-; SSE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V8I64 = add <8 x i64> undef, undef
-; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I32 = add i32 undef, undef
-; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4I32 = add <4 x i32> undef, undef
-; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8I32 = add <8 x i32> undef, undef
-; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16I32 = add <16 x i32> undef, undef
-; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I16 = add i16 undef, undef
-; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8I16 = add <8 x i16> undef, undef
-; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16I16 = add <16 x i16> undef, undef
-; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V32I16 = add <32 x i16> undef, undef
-; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I8 = add i8 undef, undef
-; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16I8 = add <16 x i8> undef, undef
-; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V32I8 = add <32 x i8> undef, undef
-; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V64I8 = add <64 x i8> undef, undef
-; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef
-;
-; AVX1-LABEL: 'add'
-; AVX1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I64 = add i64 undef, undef
-; AVX1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2I64 = add <2 x i64> undef, undef
-; AVX1-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %V4I64 = add <4 x i64> undef, undef
-; AVX1-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %V8I64 = add <8 x i64> undef, undef
-; AVX1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I32 = add i32 undef, undef
-; AVX1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4I32 = add <4 x i32> undef, undef
-; AVX1-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %V8I32 = add <8 x i32> undef, undef
-; AVX1-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %V16I32 = add <16 x i32> undef, undef
-; AVX1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I16 = add i16 undef, undef
-; AVX1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8I16 = add <8 x i16> undef, undef
-; AVX1-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %V16I16 = add <16 x i16> undef, undef
-; AVX1-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %V32I16 = add <32 x i16> undef, undef
-; AVX1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I8 = add i8 undef, undef
-; AVX1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16I8 = add <16 x i8> undef, undef
-; AVX1-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %V32I8 = add <32 x i8> undef, undef
-; AVX1-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %V64I8 = add <64 x i8> undef, undef
-; AVX1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef
-;
-; AVX2-LABEL: 'add'
-; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I64 = add i64 undef, undef
-; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2I64 = add <2 x i64> undef, undef
-; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4I64 = add <4 x i64> undef, undef
-; AVX2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8I64 = add <8 x i64> undef, undef
-; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I32 = add i32 undef, undef
-; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4I32 = add <4 x i32> undef, undef
-; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8I32 = add <8 x i32> undef, undef
-; AVX2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V16I32 = add <16 x i32> undef, undef
-; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I16 = add i16 undef, undef
-; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8I16 = add <8 x i16> undef, undef
-; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16I16 = add <16 x i16> undef, undef
-; AVX2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V32I16 = add <32 x i16> undef, undef
-; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I8 = add i8 undef, undef
-; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16I8 = add <16 x i8> undef, undef
-; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V32I8 = add <32 x i8> undef, undef
-; AVX2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V64I8 = add <64 x i8> undef, undef
-; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef
-;
-; AVX512F-LABEL: 'add'
-; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I64 = add i64 undef, undef
-; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2I64 = add <2 x i64> undef, undef
-; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4I64 = add <4 x i64> undef, undef
-; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8I64 = add <8 x i64> undef, undef
-; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I32 = add i32 undef, undef
-; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4I32 = add <4 x i32> undef, undef
-; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8I32 = add <8 x i32> undef, undef
-; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16I32 = add <16 x i32> undef, undef
-; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I16 = add i16 undef, undef
-; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8I16 = add <8 x i16> undef, undef
-; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16I16 = add <16 x i16> undef, undef
-; AVX512F-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %V32I16 = add <32 x i16> undef, undef
-; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I8 = add i8 undef, undef
-; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16I8 = add <16 x i8> undef, undef
-; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V32I8 = add <32 x i8> undef, undef
-; AVX512F-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %V64I8 = add <64 x i8> undef, undef
-; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef
-;
-; AVX512BW-LABEL: 'add'
-; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I64 = add i64 undef, undef
-; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2I64 = add <2 x i64> undef, undef
-; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4I64 = add <4 x i64> undef, undef
-; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8I64 = add <8 x i64> undef, undef
-; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I32 = add i32 undef, undef
-; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4I32 = add <4 x i32> undef, undef
-; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8I32 = add <8 x i32> undef, undef
-; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16I32 = add <16 x i32> undef, undef
-; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I16 = add i16 undef, undef
-; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8I16 = add <8 x i16> undef, undef
-; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16I16 = add <16 x i16> undef, undef
-; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V32I16 = add <32 x i16> undef, undef
-; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I8 = add i8 undef, undef
-; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16I8 = add <16 x i8> undef, undef
-; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V32I8 = add <32 x i8> undef, undef
-; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V64I8 = add <64 x i8> undef, undef
-; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef
-;
-; AVX512DQ-LABEL: 'add'
-; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I64 = add i64 undef, undef
-; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2I64 = add <2 x i64> undef, undef
-; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4I64 = add <4 x i64> undef, undef
-; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8I64 = add <8 x i64> undef, undef
-; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I32 = add i32 undef, undef
-; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4I32 = add <4 x i32> undef, undef
-; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8I32 = add <8 x i32> undef, undef
-; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16I32 = add <16 x i32> undef, undef
-; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I16 = add i16 undef, undef
-; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8I16 = add <8 x i16> undef, undef
-; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16I16 = add <16 x i16> undef, undef
-; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %V32I16 = add <32 x i16> undef, undef
-; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I8 = add i8 undef, undef
-; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16I8 = add <16 x i8> undef, undef
-; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V32I8 = add <32 x i8> undef, undef
-; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %V64I8 = add <64 x i8> undef, undef
-; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef
-;
- %I64 = add i64 undef, undef
- %V2I64 = add <2 x i64> undef, undef
- %V4I64 = add <4 x i64> undef, undef
- %V8I64 = add <8 x i64> undef, undef
-
- %I32 = add i32 undef, undef
- %V4I32 = add <4 x i32> undef, undef
- %V8I32 = add <8 x i32> undef, undef
- %V16I32 = add <16 x i32> undef, undef
-
- %I16 = add i16 undef, undef
- %V8I16 = add <8 x i16> undef, undef
- %V16I16 = add <16 x i16> undef, undef
- %V32I16 = add <32 x i16> undef, undef
-
- %I8 = add i8 undef, undef
- %V16I8 = add <16 x i8> undef, undef
- %V32I8 = add <32 x i8> undef, undef
- %V64I8 = add <64 x i8> undef, undef
-
- ret i32 undef
-}
-
-define i32 @sub(i32 %arg) {
-; SSE-LABEL: 'sub'
-; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I64 = sub i64 undef, undef
-; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2I64 = sub <2 x i64> undef, undef
-; SSE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4I64 = sub <4 x i64> undef, undef
-; SSE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V8I64 = sub <8 x i64> undef, undef
-; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I32 = sub i32 undef, undef
-; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4I32 = sub <4 x i32> undef, undef
-; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8I32 = sub <8 x i32> undef, undef
-; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16I32 = sub <16 x i32> undef, undef
-; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I16 = sub i16 undef, undef
-; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8I16 = sub <8 x i16> undef, undef
-; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16I16 = sub <16 x i16> undef, undef
-; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V32I16 = sub <32 x i16> undef, undef
-; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I8 = sub i8 undef, undef
-; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16I8 = sub <16 x i8> undef, undef
-; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V32I8 = sub <32 x i8> undef, undef
-; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V64I8 = sub <64 x i8> undef, undef
-; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef
-;
-; AVX1-LABEL: 'sub'
-; AVX1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I64 = sub i64 undef, undef
-; AVX1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2I64 = sub <2 x i64> undef, undef
-; AVX1-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %V4I64 = sub <4 x i64> undef, undef
-; AVX1-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %V8I64 = sub <8 x i64> undef, undef
-; AVX1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I32 = sub i32 undef, undef
-; AVX1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4I32 = sub <4 x i32> undef, undef
-; AVX1-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %V8I32 = sub <8 x i32> undef, undef
-; AVX1-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %V16I32 = sub <16 x i32> undef, undef
-; AVX1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I16 = sub i16 undef, undef
-; AVX1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8I16 = sub <8 x i16> undef, undef
-; AVX1-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %V16I16 = sub <16 x i16> undef, undef
-; AVX1-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %V32I16 = sub <32 x i16> undef, undef
-; AVX1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I8 = sub i8 undef, undef
-; AVX1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16I8 = sub <16 x i8> undef, undef
-; AVX1-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %V32I8 = sub <32 x i8> undef, undef
-; AVX1-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %V64I8 = sub <64 x i8> undef, undef
-; AVX1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef
-;
-; AVX2-LABEL: 'sub'
-; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I64 = sub i64 undef, undef
-; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2I64 = sub <2 x i64> undef, undef
-; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4I64 = sub <4 x i64> undef, undef
-; AVX2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8I64 = sub <8 x i64> undef, undef
-; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I32 = sub i32 undef, undef
-; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4I32 = sub <4 x i32> undef, undef
-; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8I32 = sub <8 x i32> undef, undef
-; AVX2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V16I32 = sub <16 x i32> undef, undef
-; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I16 = sub i16 undef, undef
-; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8I16 = sub <8 x i16> undef, undef
-; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16I16 = sub <16 x i16> undef, undef
-; AVX2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V32I16 = sub <32 x i16> undef, undef
-; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I8 = sub i8 undef, undef
-; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16I8 = sub <16 x i8> undef, undef
-; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V32I8 = sub <32 x i8> undef, undef
-; AVX2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V64I8 = sub <64 x i8> undef, undef
-; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef
-;
-; AVX512F-LABEL: 'sub'
-; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I64 = sub i64 undef, undef
-; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2I64 = sub <2 x i64> undef, undef
-; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4I64 = sub <4 x i64> undef, undef
-; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8I64 = sub <8 x i64> undef, undef
-; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I32 = sub i32 undef, undef
-; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4I32 = sub <4 x i32> undef, undef
-; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8I32 = sub <8 x i32> undef, undef
-; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16I32 = sub <16 x i32> undef, undef
-; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I16 = sub i16 undef, undef
-; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8I16 = sub <8 x i16> undef, undef
-; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction...
[truncated]
``````````
</details>
https://github.com/llvm/llvm-project/pull/131840
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